PIC16F74-I/L Microchip Technology Inc., PIC16F74-I/L Datasheet - Page 89

• Manufacturer Part Number: PIC16F74-I/L
• Description: 44 PIN, 7 KB FLASH, 192 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F74-I/L

• A/d Inputs: 8-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.2
The A/D conversion time per bit is defined as T
A/D conversion requires 9.0 T
The source of the A/D conversion clock is software
selectable. The four possible options for T
For correct A/D conversions, the A/D conversion clock
(T
as small as possible, but no less than 1.6 µs.
11.3
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bits set (input). If the TRIS bit is cleared (out-
put), the digital output level (V
converted.
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
11.4
Setting the GO/DONE bit begins an A/D conversion.
When the conversion completes, the 8-bit result is
placed in the ADRES register, the GO/DONE bit is
cleared, and the ADIF flag (PIR<6>) is set.
If both the A/D interrupt bit ADIE (PIE1<6>) and the
peripheral interrupt enable bit PEIE (INTCON<6>) are
set, the device will wake from SLEEP whenever ADIF
is set by hardware. In addition, an interrupt will also
occur if the global interrupt bit GIE (INTCON<7>) is set.
 2002 Microchip Technology Inc.
AD
Note:
Note 1: When reading the port register, all pins
) must be selected to ensure a minimum T
• 2 T
• 8 T
• 32 T
• Internal RC oscillator (2-6 µs)
Selecting the A/D Conversion
Clock
Configuring Analog Port Pins
A/D Conversions
2: Analog levels on any pin that is defined as
OSC
OSC
OSC
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
a digital input, but not as an analog input,
may cause the digital input buffer to con-
sume current that is out of the device’s
specification.
(F
(F
(F
OSC
OSC
OSC
/2)
/8)
/32)
AD
per 8-bit conversion.
OH
or V
AD
OL
are:
) will be
AD
AD
. The
time
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The ADRES register will
NOT be changed, and the ADIF flag will not be set.
After the GO/DONE bit is cleared at either the end of a
conversion, or by firmware, another conversion can be
initiated by setting the GO/DONE bit. Users must still
take into account the appropriate acquisition time for
the application.
11.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = ‘11’). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared,
and the result loaded into the ADRES register. If the
A/D interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
11.6
A device RESET forces all registers to their RESET
state. The A/D module is disabled and any conversion
in progress is aborted. All A/D input pins are configured
as analog inputs.
The ADRES register will contain unknown data after a
Power-on Reset.
Note:
A/D Operation During SLEEP
Effects of a RESET
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To perform an A/D
conversion in SLEEP, ensure the SLEEP
instruction immediately follows the instruc-
tion that sets the GO/DONE bit.
PIC16F7X
DS30325B-page 87