PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 154

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC17C7XX
15.2.9
To initiate a START condition, the user sets the START
condition enable bit, SEN (SSPCON2<0>). If the SDA
and SCL pins are sampled high, the baud rate genera-
tor is reloaded with the contents of SSPADD<6:0> and
starts its count. If SCL and SDA are both sampled high
when the baud rate generator times out (T
SDA pin is driven low. The action of the SDA being
driven low while SCL is high is the START condition
and causes the S bit (SSPSTAT<3>) to be set. Follow-
ing this, the baud rate generator is reloaded with the
contents of SSPADD<6:0> and resumes its count.
When the baud rate generator times out (T
SEN bit (SSPCON2<0>) will be automatically cleared
by hardware, the baud rate generator is suspended,
leaving the SDA line held low and the START condition
is complete.
FIGURE 15-20:
DS30289B-page 154
Note:
If at the beginning of START condition, the
SDA and SCL pins are already sampled
low, or if during the START condition, the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs.
The Bus Collision Interrupt Flag (BCLIF) is
set, the START condition is aborted and
the I
I
CONDITION TIMING
2
C MASTER MODE START
2
C module is reset into its IDLE state.
Write to SEN bit occurs here.
FIRST START BIT TIMING
SDA
SCL
BRG
BRG
SDA = 1,
SCL = 1
T
), the
), the
BRG
Set S bit (SSPSTAT<3>)
T
S
BRG
At completion of START bit,
Hardware clears SEN bit
15.2.9.1
If the user writes the SSPBUF when a START
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
and sets SSPIF bit.
Note:
T
Write to SSPBUF occurs here.
BRG
1st Bit
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the START
condition is complete.
WCOL Status Flag
T
BRG
2000 Microchip Technology Inc.
2nd Bit