PIC16F676-I/ST Microchip Technology Inc., PIC16F676-I/ST Datasheet

no-image

PIC16F676-I/ST

Manufacturer Part Number
PIC16F676-I/ST
Description
14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F676-I/ST

Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin TSSO
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F676-I/ST
Manufacturer:
MICROCHIP
Quantity:
3 400
Part Number:
PIC16F676-I/ST
Manufacturer:
MICROCHIP
Quantity:
1
Part Number:
PIC16F676-I/ST
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F630/676
Data Sheet
14-Pin FLASH-Based 8-Bit
CMOS Microcontrollers
 2003 Microchip Technology Inc.
DS40039C

Related parts for PIC16F676-I/ST

PIC16F676-I/ST Summary of contents

Page 1

... Microchip Technology Inc. PIC16F630/676 Data Sheet 14-Pin FLASH-Based 8-Bit CMOS Microcontrollers DS40039C ...

Page 2

... QS-9000 compliant for its ® ® PICmicro 8-bit MCUs code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.  2003 Microchip Technology Inc ...

Page 3

... One analog comparator - Programmable on-chip comparator voltage reference (CV - Programmable input multiplexing from device inputs - Comparator output is externally accessible • Analog-to-Digital Converter module (PIC16F676): - 10-bit resolution - Programmable 8-channel input - Voltage reference input • Timer0: 8-bit timer/counter with 8-bit programmable prescaler • Enhanced Timer1: ...

Page 4

... PDIP, SOIC, TSSOP RA5/T1CKI/OSC1/CLKIN RA4/T1G/OSC2/CLKOUT RA3/MCLR/V RA5/T1CKI/OSC1/CLKIN RA4/T1G/OSC2/AN3/CLKOUT RA3/MCLR/V DS40039C-page RA0/CIN+/ICSPDAT 3 12 RA1/CIN-/ICSPCLK RA2/COUT/T0CKI/INT RC5 5 10 RC0 RC4 6 RC1 9 RC3 7 RC2 RA0/AN0/CIN+/ICSPDAT 3 12 RA1/AN1/CIN-/ RA2/AN2/COUT/T0CKI/INT RC5 5 10 RC0/AN4 RC4 6 9 RC1/AN5 RC3/AN7 7 RC2/AN6 8 REF /ICSPCLK  2003 Microchip Technology Inc. ...

Page 5

... Ports A and C ............................................................................................................................................................................ 19 4.0 Timer0 Module .......................................................................................................................................................................... 29 5.0 Timer1 Module with Gate Control ............................................................................................................................................. 32 6.0 Comparator Module .................................................................................................................................................................. 37 7.0 Analog-to-Digital Converter (A/D) Module (PIC16F676 only) ................................................................................................... 43 8.0 Data EEPROM Memory............................................................................................................................................................ 49 9.0 Special Features of the CPU .................................................................................................................................................... 53 10.0 Instruction Set Summary ........................................................................................................................................................... 71 11.0 Development Support ............................................................................................................................................................... 79 12.0 Electrical Specifications ............................................................................................................................................................ 85 13 ...

Page 6

... PIC16F630/676 NOTES: DS40039C-page 4  2003 Microchip Technology Inc. ...

Page 7

... The PIC16F630 and PIC16F676 devices are covered by this Data Sheet. They are identical, except the PIC16F676 has a 10-bit A/D converter. They come in 14-pin PDIP, SOIC and TSSOP packages. Figure 1-1 shows a block diagram of the PIC16F630/676 devices. Table 1-1 shows the pinout description. ...

Page 8

... RC2 AN6 RC3/AN7 RC3 AN7 RC4 RC4 RC5 RC5 Legend: Shade = PIC16F676 only TTL = TTL input buffer ST = Schmitt Trigger input buffer DS40039C-page 6 Input Output Type Type TTL CMOS Bi-directional I/O w/ programmable pull-up and Interrupt-on-change AN — A/D Channel 0 input AN Comparator input TTL ...

Page 9

... Stack Level 8 RESET Vector Interrupt Vector On-chip Program Memory  2003 Microchip Technology Inc. 2.2 Data Memory Organization The data memory (see Figure 2-2) is partitioned into two banks, which contain the General Purpose regis- ters and the Special Function registers. The Special Function registers are located in the first 32 locations of each bank ...

Page 10

... ADCON1 20h General Purpose accesses Registers 20h-5Fh 64 Bytes 5Fh 60h 7Fh Bank 0 Bank 1 Unimplemented data memory locations, read as '0'. 1: Not a physical register. 2: PIC16F676 only.  2003 Microchip Technology Inc. File Address (1) 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h ...

Page 11

... Unimplemented locations read as ‘0’ unchanged unknown value depends on condition shaded = unimplemented Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation. 2: IRP & RP1 bits are reserved, always maintain these bits clear. 3: PIC16F676 only.  2003 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 ...

Page 12

... Unimplemented locations read as ‘0’ unchanged unknown value depends on condition, shaded = unimplemented Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation. 2: IRP & RP1 bits are reserved, always maintain these bits clear. 3: PIC16F676 only. DS40039C-page 10 Bit 5 Bit 4 Bit 3 Bit 2 ...

Page 13

... Legend Readable bit - n = Value at POR  2003 Microchip Technology Inc recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register, because these instructions do not affect any STATUS bits. For other instructions not affecting any STATUS bits, see the “ ...

Page 14

... PSA bit to ‘1’ (OPTION<3>). See Section 4.4. R/W-1 R/W-1 R/W-1 R/W-1 T0CS T0SE PSA 128 256 1 : 128 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-1 R/W-1 PS2 PS1 PS0 bit Bit is unknown  2003 Microchip Technology Inc. ...

Page 15

... T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on RESET and should be initialized before clearing T0IF bit. Legend Readable bit - n = Value at POR  2003 Microchip Technology Inc. PIC16F630/676 Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...

Page 16

... EEIE: EE Write Complete Interrupt Enable bit 1 = Enables the EE write complete interrupt 0 = Disables the EE write complete interrupt bit 6 ADIE: A/D Converter Interrupt Enable bit (PIC16F676 only Enables the A/D converter interrupt 0 = Disables the A/D converter interrupt bit 5-4 Unimplemented: Read as ‘0’ ...

Page 17

... EEIF: EEPROM Write Operation Interrupt Flag bit 1 = The write operation completed (must be cleared in software The write operation has not completed or has not been started bit 6 ADIF: A/D Converter Interrupt Flag bit (PIC16F676 only The A/D conversion is complete (must be cleared in software The A/D conversion is not complete bit 5-4 Unimplemented: Read as ‘ ...

Page 18

... CAL3 CAL2 CAL1 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared U-0 R/W-0 R/W-x — POR BOD bit Bit is unknown R/W-0 U-0 U-0 CAL0 — — bit Bit is unknown  2003 Microchip Technology Inc. ...

Page 19

... GOTO method, care should be exercised if the table location crosses a PCL memory boundary (each 256-byte block). Refer to the Application Note “Implementing a Table Read" (AN556).  2003 Microchip Technology Inc. PIC16F630/676 2.3.2 STACK The PIC16F630/676 family has an 8-level x 13-bit wide hardware stack (see Figure 2-1) ...

Page 20

... Not Used Bank 1 Bank 2 Bank 3 INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ;to RAM INDF ;clear INDF register FSR ;inc pointer FSR,4 ;all done? NEXT ;no clear next ;yes continue Indirect Addressing ( FSR Register Location Select 1FFh  2003 Microchip Technology Inc. ...

Page 21

... Note: The ANSEL (9Fh) and CMCON (19h) registers must be initialized to configure an analog channel as a digital input. Pins configured as analog inputs will read ‘0’. The ANSEL register is defined for the PIC16F676. EXAMPLE 3-1: bcf STATUS,RP0 clrf PORTA movlw 05h ...

Page 22

... Q2 cycle), then the RAIF interrupt flag may not get set. R/W-x R/W-x R/W-x TRISA2 TRISA1 TRISA0 bit Bit is unknown R/W-1 R/W-1 R/W-1 WPUA2 WPUA1 WPUA0 bit Bit is unknown  2003 Microchip Technology Inc. ...

Page 23

... IOCA<5:0>: Interrupt-on-Change PORTA Control bit 1 = Interrupt-on-change enabled 0 = Interrupt-on-change disabled Note: Global interrupt enable (GIE) must be enabled for individual interrupts to be recognized. Legend Readable bit - n = Value at POR  2003 Microchip Technology Inc. U-0 R/W-0 R/W-0 R/W-0 — IOCA5 IOCA4 IOCA3 W = Writable bit U = Unimplemented bit, read as ‘ ...

Page 24

... Figure 3-1 shows the diagram for this pin. The RA1 pin is configurable to function as one of the following: • general purpose I/O • an analog input for the A/D (PIC16F676 only) • an analog input to the comparator • a voltage reference input for the A/D (PIC16F676 only) DS40039C-page 22 FIGURE 3-1: BLOCK DIAGRAM OF RA0 ...

Page 25

... Figure 3-2 shows the diagram for this pin. The RA2 pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the A/D (PIC16F676 only) • a digital output from the comparator • the clock input for TMR0 • an external edge triggered interrupt ...

Page 26

... RA4/AN3/T1G/OSC2/CLKOUT Figure 3-4 shows the diagram for this pin. The RA4 pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the A/D (PIC16F676 only) • a TMR1 gate input • a crystal/resonator connection • a clock output FIGURE 3-4: ...

Page 27

... ANSEL ANS7 ANS6 95h WPUA — — 96h IOCA — — Note 1: PIC16F676 only. Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by PORTA.  2003 Microchip Technology Inc. PIC16F630/676 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RA5 RA4 RA3 ...

Page 28

... STATUS,RP0 ;Bank 0 3.3.1 RC0/AN4, RC1/AN5, RC2/AN6, RC3/ AN7 The RC0/RC1/RC2/RC3 pins are configurable to function as one of the following: • a general purpose I/O • an analog input for the A/D Converter (PIC16F676 only) FIGURE 3-6: BLOCK DIAGRAM OF RC0/RC1/RC2/RC3 PINs Data bus PORTC ...

Page 29

... PORTC — — 87h TRISC — — (1) ANS7 ANS6 91h ANSEL Note 1: PIC16F676 only. Legend unchanged unimplemented locations read as '0'. Shaded cells are not used by PORTC unknow  2003 Microchip Technology Inc. U-0 R/W-x R/W-x R/W-x RC5 RC4 RC3 — ...

Page 30

... PIC16F630/676 NOTES: DS40039C-page 28  2003 Microchip Technology Inc. ...

Page 31

... PSA Watchdog Timer WDTE Note 1: T0SE, T0CS, PSA, PS0-PS2 are bits in the Option register.  2003 Microchip Technology Inc. PIC16F630/676 Counter mode is selected by setting the T0CS bit (OPTION_REG<5>). In this mode, the Timer0 module will increment either on every rising or falling edge of pin RA2/T0CKI. The incrementing edge is determined ...

Page 32

... Note: The ANSEL (9Fh) and CMCON (19h) registers must be initialized to configure an analog channel as a digital input. Pins OSC (and configured as analog inputs will read ‘0’. The ANSEL register is defined for the PIC16F676. R/W-1 R/W-1 R/W-1 T0CS T0SE PSA ...

Page 33

... OPTION_REG RAPU INTEDG 85h TRISA — — Legend: — = Unimplemented locations, read as ‘0’ unchanged unknown. Shaded cells are not used by the Timer0 module.  2003 Microchip Technology Inc. PIC16F630/676 EXAMPLE 4-1: bcf STATUS,RP0 clrwdt clrf TMR0 bsf STATUS,RP0 movlw b’ ...

Page 34

... Timer1 module. Note: Additional information on timer modules is available in the PICmicro Reference Manual, (DS33023). 0 TMR1L 1 T1SYNC 1 Prescaler OSC /4 Internal 0 Clock 2 T1CKPS<1:0> TMR1CS TM Mid-Range TMR1ON TMR1GE T1G TMR1ON TMR1GE Synchronized Clock Input Synchronize Detect SLEEP Input  2003 Microchip Technology Inc. ...

Page 35

... Enabled Note 1: Arrows indicate counter increments Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of the clock.  2003 Microchip Technology Inc. 5.2 Timer1 Interrupt The Timer1 register pair (TMR1H:TMR1L) increments to FFFFh and rolls over to 0000h. When Timer1 rolls over, the Timer1 interrupt flag bit (PIR1< ...

Page 36

... Stops Timer1 Legend Readable bit - n = Value at POR DS40039C-page 34 R/W-0 R/W-0 R/W-0 OSC / Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-0 R/W-0 R/W-0 T1SYNC TMR1CS TMR1ON bit Bit is unknown  2003 Microchip Technology Inc. ...

Page 37

... The ANSEL (9Fh) and CMCON (19h) registers must be initialized to configure an analog channel as a digital input. Pins configured as analog inputs will read ‘0’. The ANSEL register is defined for the PIC16F676. 5.4.1 READING AND WRITING TIMER1 IN ASYNCHRONOUS COUNTER MODE Reading TMR1H or TMR1L, while the timer is running from an external asynchronous clock, will ensure a valid read (taken care of in hardware) ...

Page 38

... PIC16F630/676 NOTES: DS40039C-page 36  2003 Microchip Technology Inc. ...

Page 39

... Figure 6-2 shows the Comparator modes and CM2:CM0 bit settings Legend Readable bit - n = Value at POR  2003 Microchip Technology Inc. Voltage Reference that can also be applied to an input of the comparator. In addition, RA2 can be configured as the comparator output. The Comparator Control Register (CMCON), shown in Register 6-1, contains the bits to control the comparator ...

Page 40

... Table 6-1. DS40039C-page 38 TABLE 6-1: OUTPUT STATE VS. INPUT CONDITIONS Input Conditions less > < > < FIGURE 6- Output Note: CINV bit (CMCON<4>) is clear. CINV COUT SINGLE COMPARATOR + Output –  2003 Microchip Technology Inc. ...

Page 41

... RA2/COUT Analog Input, ports always reads ‘0’ Digital Input CIS = Comparator Input Switch (CMCON<3>)  2003 Microchip Technology Inc. Comparator mode is changed, the comparator output level may not be valid for a specified period of time. Refer to the specifications in Section 12.0. Note: Comparator interrupts should be disabled during a Comparator mode change ...

Page 42

... TTL input specification. 2: Analog levels on any pin that is defined as a digital input, may cause the input buffer to consume more current than is specified CINV CMCON EN RESET impedance of 10 kΩ RA0/CIN+ RA1/CIN- CV REF CM2:CM0  2003 Microchip Technology Inc. ...

Page 43

... To minimize power consumption while in SLEEP mode, turn off the comparator, CM2:CM0 = 111, and voltage reference, VRCON<7>  2003 Microchip Technology Inc. PIC16F630/676 The following equations determine the output voltages: VRR = 1 (low range): CV VRR = 0 (high range): CV ...

Page 44

... Value on Bit 1 Bit 0 all other POR, BOD RESETS INTF RAIF 0000 0000 0000 000u — TMR1IF 00-- 0--0 00-- 0--0 CM1 CM0 -0-0 0000 -0-0 0000 — TMR1IE 00-- 0--0 00-- 0--0 VR1 VR0 0-0- 0000 0-0- 0000  2003 Microchip Technology Inc. ...

Page 45

... The converter generates a binary result via successive approximation and stores the result in a 10-bit register. The voltage reference used in the conversion is software selectable to either voltage applied by the V shows the block diagram of the A/D on the PIC16F676 VCFG = 0 V REF VCFG = 1 ...

Page 46

... ADRESL LSB bit 0 Unimplemented: Read as ‘0’ LSB bit 0 10-bit A/D Result  2003 Microchip Technology Inc. ...

Page 47

... OSC /4 101 = F OSC /16 110 = F OSC /64 bit 3-0: Unimplemented: Read as ‘0’. Legend Readable bit - n = Value at POR  2003 Microchip Technology Inc. PIC16F630/676 U-0 R/W-0 R/W-0 R/W-0 — CHS2 CHS1 CHS0 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’ ...

Page 48

... PIC16F630/676 REGISTER 7-3: ANSEL — ANALOG SELECT REGISTER (ADRESS: 91h) (PIC16F676 ONLY) R/W-1 R/W-1 ANS7 ANS6 bit 7 bit 7-0: ANS<7:0>: Analog Select between analog or digital function on pins AN<7:0>, respectively Analog input. Pin is assigned as analog input Digital I/O. Pin is assigned to port or special function. ...

Page 49

... SS = sampling switch C HOLD = sample/hold capacitance (from DAC)  2003 Microchip Technology Inc. After the analog input channel is selected (changed), this acquisition must be done before the conversion can be started. To calculate the minimum acquisition time, Equation 7-1 may be used. This equation assumes that 1/2 LSb error is used (1024 steps for the A/D) ...

Page 50

... GO ADON 00-0 0000 00-0 0000 TRISA1 TRISA0 --11 1111 --11 1111 TRISC1 TRISC0 --11 1111 --11 1111 — TMR1IE 00-- 0--0 00-- 0--0 ANS1 ANS0 1111 1111 1111 1111 xxxx xxxx uuuu uuuu — — -000 ---- -000 ----  2003 Microchip Technology Inc. ...

Page 51

... EEADR: Specifies one of 128 locations for EEPROM Read/Write Operation Legend Readable bit - n = Value at POR  2003 Microchip Technology Inc. PIC16F630/676 The EEPROM data memory allows byte read and write. A byte write automatically erases the location and writes the new data (erase before write). The EEPROM data memory is rated for high erase/write cycles ...

Page 52

... Data EEPROM write sequence. U-0 U-0 U-0 R/W-x — — — WRERR W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-0 R/S-0 R/S-0 WREN WR RD bit Bit is unknown  2003 Microchip Technology Inc. ...

Page 53

... WREN bit clear at all times, except when updating EEPROM. The WREN bit is not cleared by hardware.  2003 Microchip Technology Inc. PIC16F630/676 After a write sequence has been initiated, clearing the WREN bit will not affect this write cycle. The WR bit will be inhibited from being set unless the WREN bit is set ...

Page 54

... Bit 4 Bit 3 Bit 2 — — CMIF — — — WRERR WREN Value on all Value on Bit 1 Bit 0 other POR, BOD RESETS — TMR1IF 00-- 0--0 00-- 0--0 0000 0000 0000 0000 -000 0000 -000 0000 WR RD ---- x000 ---- q000 ---- ---- ---- ----  2003 Microchip Technology Inc. ...

Page 55

... Watchdog Timer (WDT) • SLEEP • Code protection • ID Locations • In-Circuit Serial Programming  2003 Microchip Technology Inc. PIC16F630/676 The PIC16F630/676 has a Watchdog Timer that is controlled by configuration bits. It runs off its own RC oscillator for added reliability. There are two timers that offer necessary delays on power-up ...

Page 56

... Specification for more information. R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 CPD CP BODEN MCLRE PWRTE WDTE F0SC2 F0SC1 F0SC0 (1) (2) (4) ( Writable bit U = Unimplemented bit, read as ‘0’ bit is set 0 = bit is cleared R/P-1 R/P-1 R/P-1 R/P-1 bit bit is unknown  2003 Microchip Technology Inc. ...

Page 57

... C1 and C2 series resistor may be required for AT strip cut crystals varies with the Oscillator mode selected (Approx. value = 10 MΩ).  2003 Microchip Technology Inc. FIGURE 9-2: Clock from External System Open Note 1: Functions as RA4 in EC Osc mode. TABLE 9-1: ...

Page 58

... OSCILLATOR Z Section 12.0, for information OSC /4. Calibrating the Internal Oscillator CALIBRATING THE INTERNAL OSCILLATOR STATUS, RP0 ;Bank 1 3FFh ;Get the cal value OSCCAL ;Calibrate STATUS, RP0 ;Bank 0 OSC /4) is output on the OSC /4 can be used for test  2003 Microchip Technology Inc ...

Page 59

... Ripple Counter RC OSC Note 1: This is a separate oscillator from the INTOSC/EC oscillator.  2003 Microchip Technology Inc. PIC16F630/676 They are not affected by a WDT wake-up, since this is viewed as the resumption of normal operation. TO and PD bits are set or cleared differently in different RESET situations as indicated in Table 9-4 ...

Page 60

... OSC1 input) delay after the PWRT delay is over. This ensures that the crystal oscillator or resonator has started and stabilized. The OST time-out is invoked only for XT, LP and HS modes and only on Power-on Reset or wake-up from SLEEP BOD (see DD to  2003 Microchip Technology Inc. ...

Page 61

... Table 9-6 shows the RESET conditions for some special registers, while Table 9-7 shows the RESET conditions for all the registers.  2003 Microchip Technology Inc. On any RESET (Power-on, Brown-out Detect, Watchdog, etc.), the chip will remain in RESET until V ...

Page 62

... Wake-up from SLEEP PWRTE = 1 1024•T OSC 1024•T OSC — — Value on all Value on Bit 0 other POR, BOD (1) RESETS 0001 1xxx 000q quuu C ---- --0x ---- --uq BOD PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ---- --uu ---- --10 ---- --uu  2003 Microchip Technology Inc. ...

Page 63

... If wake-up was due to data EEPROM write completing, bit A/D conversion completing, bit Comparator input changing, bit Timer1 rolling over, bit All other interrupts generating a wake-up will cause these bits RESET was due to brown-out, then bit All other RESETS will cause bit  2003 Microchip Technology Inc. • MCLR Reset • WDT Reset (1) • ...

Page 64

... MCLR Internal POR PWRT Time-out OST Time-out Internal RESET FIGURE 9-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED MCLR Internal POR PWRT Time-out OST Time-out Internal RESET DS40039C-page 62 T PWRT T OST T PWRT T OST DD T PWRT T OST  2003 Microchip Technology Inc. ): CASE CASE ...

Page 65

... External Interrupt RA2/INT • TMR0 Overflow Interrupt • PORTA Change Interrupts • Comparator Interrupt • A/D Interrupt (PIC16F676 only) • TMR1 Overflow Interrupt • EEPROM Data Write Interrupt The Interrupt Control register (INTCON) and Peripheral Interrupt register (PIR) record individual interrupt requests in flag bits ...

Page 66

... IOCA-RA1 IOCA1 IOCA-RA2 IOCA2 IOCA-RA3 IOCA3 IOCA-RA4 IOCA4 IOCA-RA5 IOCA5 TMR1IF TMR1IE CMIF CMIE (1) ADIF ADIE EEIF EEIE Note 1: PIC16F676 only. DS40039C-page 64 T0IF Wake-up (If in SLEEP mode) T0IE INTF INTE RAIF RAIE PEIE GIE  2003 Microchip Technology Inc. Interrupt to CPU ...

Page 67

... SLEEP through RA2/INT interrupt. Note: The ANSEL 9Fh) and CMCON (19h) registers must be initialized to configure an analog channel as a digital input. Pins configured as analog inputs will read ‘0’. The ANSEL register is defined for the PIC16F676. FIGURE 9-11: INT PIN INTERRUPT TIMING ...

Page 68

... WDT prescaler) it may take several seconds before a WDT time-out occurs. Value on all Value on Bit 0 other POR, BOD RESETS RAIF 0000 0000 0000 000u TMR1IF 00-- 0--0 00-- 0--0 TMR1IE 00-- 0--0 00-- 0--0 instructions clear the WDT SLEEP DD = Min., Temperature = Max., Max.  2003 Microchip Technology Inc. ...

Page 69

... SUMMARY OF WATCHDOG TIMER REGISTERS Address Name Bit 7 Bit 6 81h OPTION_REG RAPU INTEDG 2007h Config. bits CP BODEN MCLRE PWRTE WDTE Legend Unchanged, shaded cells are not used by the Watchdog Timer.  2003 Microchip Technology Inc. PIC16F630/676 1 0 8-bit Prescaler PSA 8 1 PS0 - PS2 0 PSA ...

Page 70

... Interrupt Latency (Note 3) Processor in SLEEP PC+2 PC Inst( Dummy cycle Inst( instruction is being executed, the SLEEP instruction. If the GIE bit is is not desirable, the user SLEEP after the instruction. SLEEP 0004h 0005h Inst(0004h) Inst(0005h) Dummy cycle Inst(0004h)  2003 Microchip Technology Inc. ...

Page 71

... On the bottom of the header is an 14-pin socket that plugs into the user’s target via the 14-pin stand-off connector. When the ICD pin on the PIC16F676-ICD device is held low, the In-Circuit Debugger functionality is enabled. This function allows simple debugging functions when used with MPLAB ICD 2. When the microcontroller has this feature enabled, some of the resources are not available for general use ...

Page 72

... PIC16F630/676 NOTES: DS40039C-page 70  2003 Microchip Technology Inc. ...

Page 73

... A read operation is performed on a register even if the instruction writes to that register.  2003 Microchip Technology Inc. PIC16F630/676 For example, a CLRF PORTA instruction will read PORTA, clear all the data bits, then write the result back to PORTA ...

Page 74

... TO,PD 0000 0110 0100 1kkk kkkk kkkk Z 1000 kkkk kkkk 00xx kkkk kkkk 0000 0000 1001 01xx kkkk kkkk 0000 0000 1000 TO,PD 0000 0110 0011 C,DC,Z 110x kkkk kkkk Z 1010 kkkk kkkk ™ Mid-Range MCU  2003 Microchip Technology Inc. ...

Page 75

... Operation: Status Affected: Z Description: AND the W register with register 'f the result is stored in the W register the result is stored back in register 'f'.  2003 Microchip Technology Inc. PIC16F630/676 BCF Bit Clear f Syntax: [label] BCF f,b 0 ≤ f ≤ 127 Operands: 0 ≤ b ≤ → ...

Page 76

... the result is stored back in register 'f'. DECF Decrement f Syntax: [label] DECF f,d 0 ≤ f ≤ 127 Operands: d ∈ [0,1] ( → (destination) Operation: Status Affected: Z Description: Decrement register 'f the result is stored in the W register the result is stored back in register 'f'.  2003 Microchip Technology Inc. ...

Page 77

... Operation: Status Affected: Z Description: The contents of register 'f' are incremented the result is placed in the W register the result is placed back in register 'f'.  2003 Microchip Technology Inc. PIC16F630/676 INCFSZ Increment f, Skip if 0 Syntax: [ label ] INCFSZ f,d 0 ≤ f ≤ 127 Operands: d ∈ [0,1] ( → ...

Page 78

... Return with Literal label ] RETLW k 0 ≤ k ≤ 255 k → (W); TOS → PC None The W register is loaded with the eight-bit literal 'k'. The program counter is loaded from the top of the stack (the return address). This is a two-cycle instruction.  2003 Microchip Technology Inc. ...

Page 79

... The contents of register 'f' are rotated one bit to the right through the Carry Flag the result is placed in the W register the result is placed back in register 'f'. C Register f  2003 Microchip Technology Inc. PIC16F630/676 SLEEP Syntax: [ label ] SLEEP Operands: None 00h → WDT, Operation: 0 → ...

Page 80

... Exclusive OR W with f Syntax: [label] XORWF 0 ≤ f ≤ 127 Operands: d ∈ [0,1] (W) .XOR. (f) → (destination) Operation: Status Affected: Z Description: Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in register 'f'.  2003 Microchip Technology Inc. f,d ...

Page 81

... OQ - PICDEM MSC ® - microID - CAN ® - PowerSmart - Analog  2003 Microchip Technology Inc. PIC16F630/676 11.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market. The MPLAB IDE is a Windows based application that contains: • ...

Page 82

... MPLAB C30 C Compiler and MPLAB ASM30 assembler. The simulator runs in either a Command Line mode for automated tasks, or from MPLAB IDE. This high speed simulator is designed to debug, analyze and optimize time intensive DSP routines.  2003 Microchip Technology Inc. software ...

Page 83

... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application.  2003 Microchip Technology Inc. PIC16F630/676 11.11 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low cost, run-time development tool, connecting to the host PC via an RS-232 or high speed USB interface ...

Page 84

... PICSTART Plus development pro- grammer, can be used to reprogram the device for user tailored application development. The PICDEM 17 demonstration board supports program download and execution from external on-board FLASH memory. A generous prototype area is available for user hardware expansion.  2003 Microchip Technology Inc. ...

Page 85

... Tricks for 8-pin FLASH PIC Microcontrollers" Handbook and a USB Interface Cable. Supports all current 8/14-pin FLASH PIC microcontrollers, as well as many future planned devices.  2003 Microchip Technology Inc. PIC16F630/676 11.22 PICDEM USB PIC16C7X5 Demonstration Board The PICDEM USB Demonstration Board shows off the capabilities of the PIC16C745 and PIC16C765 USB microcontrollers ...

Page 86

... PIC16F630/676 NOTES: DS40039C-page 84  2003 Microchip Technology Inc. ...

Page 87

... Exposure to maximum rating conditions for extended periods may affect device reliability. Note: Voltage spikes below the MCLR pin, inducing currents greater than 80 mA, may cause latchup. Thus, Ω a series resistor of 50-100 this pin directly  2003 Microchip Technology Inc. SS ........................................................................... -0. )...............................................................................................................± ).........................................................................................................± ∑ I DIS = V DD ...

Page 88

... A 5.5 5.0 4.5 4 (Volts) 3.5 3.0 2.5 2 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16F676 WITH A/D ENABLED VOLTAGE-FREQUENCY GRAPH, -40°C ≤ T ≤ +125°C A 5.5 5.0 4.5 4 (Volts) 3.5 3.0 2.5 2 Note 1: The shaded region indicates the permissible combinations of voltage and frequency ...

Page 89

... FIGURE 12-3: PIC16F676 WITH A/D ENABLED VOLTAGE-FREQUENCY GRAPH, 0°C ≤ T ≤ +125°C A 5.5 5.0 4.5 4 (Volts) 3.5 3.0 2.5 2.2 2 Note 1: The shaded region indicates the permissible combinations of voltage and frequency.  2003 Microchip Technology Inc. PIC16F630/676 Frequency (MHz) 20 DS40039C-page 87 ...

Page 90

... Min Typ† Max Units F OSC 2.0 — 5.5 V PIC16F630/676 with A/D off 2.2 — 5.5 V PIC16F676 with A/D on, 0°C to +125°C 2.5 — 5.5 V PIC16F676 with A/D on, -40°C to +125°C 3.0 — 5 4.5 — 5.5 V 1.5* — — V Device in SLEEP mode — — ...

Page 91

... The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current consumption.  2003 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) -40°C ≤ T ...

Page 92

... and the additional current consumed when this Conditions Note WDT, BOD, Comparators, V REF , and T1OSC disabled (1) WDT Current (1) BOD Current (1) Comparator Current (1) CV REF Current ( Current (1) A/D Current  2003 Microchip Technology Inc. ...

Page 93

... The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current consumption.  2003 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) -40°C ≤ T ...

Page 94

... and the additional current consumed when this ≤ +125°C for extended Conditions Note WDT, BOD, Comparators, V REF , and T1OSC disabled (1) WDT Current (1) BOD Current (1) Comparator Current (1) CV REF Current ( Current (1) A/D Current  2003 Microchip Technology Inc. ...

Page 95

... The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin.  2003 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ T -40° ...

Page 96

... In XT, HS and LP modes when external clock is used to drive OSC1 pF ≤ +85°C A ≤ +125° Using EECON to read/write V MIN = Minimum operating voltage ms are violated ≤ +85°C A ≤ +85°C A ≤ +125°C A MIN Minimum operating voltage V ms are violated  2003 Microchip Technology Inc. ...

Page 97

... MCLR Uppercase letters and their meanings Fall H High I Invalid (Hi-impedance) L Low FIGURE 12-4: LOAD CONDITIONS Load Condition 1 Pin 464Ω for all pins 15 pF for OSC2 output  2003 Microchip Technology Inc. T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid ...

Page 98

... INTOSC mode ns RC Osc mode ns XT Osc mode ns HS Osc mode 4/F OSC µs LP oscillator, T OSC L/H duty cycle ns HS oscillator, T OSC L/H duty cycle ns XT oscillator, T OSC L/H duty cycle ns LP oscillator ns XT oscillator ns HS oscillator  2003 Microchip Technology Inc. ...

Page 99

... SLEEP start-up time* * These parameters are characterized but not tested. † Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2003 Microchip Technology Inc. PIC16F630/676 Freq Min Typ† ...

Page 100

... T CY — OSC New Value Max Units Conditions 200 ns (Note 1) 200 ns (Note 1) 100 ns (Note 1) 100 ns (Note (Note 1) — ns (Note 1) — ns (Note 1) 150 * ns 300 ns — ns — — ns —  2003 Microchip Technology Inc. ...

Page 101

... Watchdog Timer Reset I/O Pins FIGURE 12-8: BROWN-OUT DETECT TIMING AND CHARACTERISTICS VDD (Device in Brown-out Detect) RESET (due to BOD) Note delay only if PWRTE bit in configuration word is programmed to ‘0’.  2003 Microchip Technology Inc. PIC16F630/676 (Device not in Brown-out Detect time-out 34 DS40039C-page 99 ...

Page 102

... TBD ms Extended Temperature µs — — 2.0 2.025 — 2.175 V TBD — — — µs 100* — —  2003 Microchip Technology Inc. Conditions = 5V, -40°C to +85°C = 5V, -40°C to +85°C = OSC1 period = 5V, -40°C to +85°C ≤ B VDD (D005) ...

Page 103

... TCKEZtmr1 Delay from external clock edge to timer increment * These parameters are characterized but not tested. † Data in ‘Typ’ column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2003 Microchip Technology Inc ...

Page 104

... LSb DD — /32 — LSb ± 1/2* — — LSb ± 1/2* — — LSb — 2k* — — — 10* Comments V Comments Low Range (VRR = 1) High Range (VRR = 0) Low Range (VRR = 1) High Range (VRR = 0) Ω µs  2003 Microchip Technology Inc. ...

Page 105

... TABLE 12-8: PIC16F676 A/D CONVERTER CHARACTERISTICS: Param Sym Characteristic No. A01 N R Resolution A02 E ABS Total Absolute Error* A03 E IL Integral Error A04 E DL Differential Error A05 E FS Full Scale Range A06 E OFF Offset Error GN A07 E Gain Error A10 — Monotonicity A20 ...

Page 106

... PIC16F630/676 FIGURE 12-10: PIC16F676 A/D CONVERSION TIMING (NORMAL MODE) BSF ADCON0, GO 134 (T OSC Q4 A/D CLK A/D DATA ADRES ADIF GO 132 SAMPLE Note 1: If the A/D clock source is selected as RC, a time of T SLEEP instruction to be executed. TABLE 12-9: PIC16F676 A/D CONVERSION REQUIREMENTS ...

Page 107

... T Q4 A/D CLK A/D DATA ADRES ADIF GO 132 SAMPLE Note 1: If the A/D clock source is selected as RC, a time of T SLEEP instruction to be executed. TABLE 12-10: PIC16F676 A/D CONVERSION REQUIREMENTS (SLEEP MODE) Param Sym Characteristic No. 130 T AD A/D Clock Period 130 T A/D Internal RC ...

Page 108

... PIC16F630/676 NOTES: DS40039C-page 106  2003 Microchip Technology Inc. ...

Page 109

... FIGURE 13-2: TYPICAL I PD 3.5E-07 3.0E-07 2.5E-07 2.0E-07 1.5E-07 1.0E-07 5.0E-08 0.0E+00 2.0 2.5  2003 Microchip Technology Inc. vs. V OVER TEMP (-40°C TO +25°C) DD Typical Baseline 3.5 4 4.5 V (V) DD vs. V OVER TEMP (+85°C) DD Typical Baseline ...

Page 110

... DS40039C-page 108 vs. V OVER TEMP (+125°C) DD Typical Baseline I PD 3.0 3.5 4.0 4.5 V (V) DD vs. V OVER TEMP (-40°C TO +25°C) DD Maximum Baseline 3.5 4 4.5 V (V) DD 125 5.0 5.5 - 5.5  2003 Microchip Technology Inc. ...

Page 111

... FIGURE 13-6: MAXIMUM I PD 9.0E-06 8.0E-06 7.0E-06 6.0E-06 5.0E-06 4.0E-06 3.0E-06 2.0E-06 1.0E-06 0.0E+00 2.0 2.5  2003 Microchip Technology Inc. vs. V OVER TEMP (+85°C) DD Maximum Baseline I PD 3.0 3.5 4.0 4.5 V (V) DD vs. V OVER TEMP (+125°C) DD Maximum Baseline ...

Page 112

... DS40039C-page 110 WITH BOD ENABLED vs. V OVER TEMP (-40°C TO +125°C) DD Typical BOD 4.5 V (V) DD WITH CMP ENABLED vs. V OVER TEMP (-40°C TO +125°C) DD Typical Comparator I PD 3.0 3.5 4.0 4.5 V ( 125 5 5.5 - 125 5.0 5.5  2003 Microchip Technology Inc. ...

Page 113

... FIGURE 13-10: TYPICAL I PD 3.5E-07 3.0E-07 2.5E-07 2.0E-07 1.5E-07 1.0E-07 5.0E-08 0.0E+00 2 2.5  2003 Microchip Technology Inc. WITH A/D ENABLED vs. V OVER TEMP (-40°C TO +25°C) DD Typical A 3.5 4 4.5 V (V) DD WITH A/D ENABLED vs. V OVER TEMP (+85°C) DD Typical A/D I ...

Page 114

... DS40039C-page 112 WITH A/D ENABLED vs. V OVER TEMP (+125°C) DD Typical A 3.5 4 4.5 V (V) DD WITH T1 OSC ENABLED vs Typical 3.0 3.5 4.0 4.5 V (V) DD 125 5 5.5 OVER TEMP (-40°C TO +125°C), - 125 5.0 5.5  2003 Microchip Technology Inc. ...

Page 115

... FIGURE 13-14: TYPICAL 2.5  2003 Microchip Technology Inc. WITH CV ENABLED vs. V OVER TEMP (-40°C TO +125°C) REF DD Typical CV I REF PD 3 3.5 4 4.5 V (V) DD WITH WDT ENABLED vs. V OVER TEMP (-40°C TO +125°C) DD Typical WDT ...

Page 116

... DS40039C-page 114 = 3.5V) DD Internal Oscillator Frequency vs Temperature 0°C 25°C 85°C Temperature (°C) Internal Oscillator Frequency 3.0V 3.5V 4.0V 4.5V V (V) DD -3sigma average +3sigma 125°C WITH 0.1µF AND 0.01µF DD -3sigma average +3sigma 5.0V 5.5V  2003 Microchip Technology Inc. ...

Page 117

... FIGURE 13-17: TYPICAL WDT PERIOD vs 2.5  2003 Microchip Technology Inc. (-40°C TO +125°C) DD WDT Time-out 3 3.5 4 4.5 V (V) DD PIC16F630/676 - 125 5 5.5 DS40039C-page 115 ...

Page 118

... PIC16F630/676 NOTES: DS40039C-page 116  2003 Microchip Technology Inc. ...

Page 119

... Standard PICmicro device marking consists of Microchip part number, year code, week code, and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price.  2003 Microchip Technology Inc. PIC16F630/676 Example 16F630-I ...

Page 120

... L p MILLIMETERS MIN NOM MAX 14 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 18.80 19.05 19.30 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10.  2003 Microchip Technology Inc. ...

Page 121

... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065  2003 Microchip Technology Inc φ ...

Page 122

... B .007 .010 .012 α β α A2 MILLIMETERS* MIN NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0. 0.09 0.15 0.20 0.19 0.25 0.  2003 Microchip Technology Inc. ...

Page 123

... This is a new data sheet. Revision B Added characterization graphs. Updated specifications. Added notes to indicate Microchip programmers maintain all calibration bits to factory settings and the PIC16F676 ANSEL register must be initialized to configure pins as digital I/O.  2003 Microchip Technology Inc. PIC16F630/676 APPENDIX B: DEVICE ...

Page 124

... These differences may cause this device to perform differently in your application than the earlier version of this device.  2003 Microchip Technology Inc. ® PIC16F6XX 20 MHz 1024 bytes 10-bit 64 bytes ...

Page 125

... Saving STATUS and W Registers in RAM ................. 66 Write Verify ................................................................. 51 Code Protection .................................................................. 69 Comparator ......................................................................... 37 Associated Registers .................................................. 42 Configuration............................................................... 39 Effects of a RESET ..................................................... 41 I/O Operating Modes................................................... 39 Interrupts..................................................................... 42  2003 Microchip Technology Inc. Operation.................................................................... 38 Operation During SLEEP............................................ 41 Output......................................................................... 40 Reference ................................................................... 41 Response Time .......................................................... 41 Comparator Specifications................................................ 102 Comparator Voltage Reference Specifications................. 102 Configuration Bits ............................................................... 54 Configuring the Voltage Reference ...

Page 126

... CONFIG (Configuration Word) ................................... 54 EEADR (EEPROM Address) ...................................... 49 EECON1 (EEPROM Control) ..................................... 50 EEDAT (EEPROM Data) ............................................ 49 INTCON (Interrupt Control)......................................... 13 IOCA (Interrupt-on-Change PORTA).......................... 21 Maps PIC16F630 ........................................................... 8 PIC16F676 ........................................................... 8 OPTION_REG (Option) ........................................ 12, 30 OSCCAL (Oscillator Calibration) ................................ 16 PCON (Power Control) ............................................... 16 PIE1 (Peripheral Interrupt Enable 1)........................... 14 PIR1 (Peripheral Interrupt 1)....................................... 15 PORTC ....................................................................... 27 STATUS ..................................................................... 11 T1CON (Timer1 Control) ...

Page 127

... Time-out Sequence on Power-up (MCLR Tied ).................................................... 62 Timer0 and Timer1 External Clock ........................... 101 Timer1 Incrementing Edge.......................................... 33 Timing Parameter Symbology............................................. 95 TRISIO Registers ................................................................ 19 V Voltage Reference Accuracy/Error ..................................... 41 W Watchdog Timer Summary of Registers ................................................ 67 Watchdog Timer (WDT) ...................................................... 66 WWW, On-Line Support ....................................................... 3  2003 Microchip Technology Inc. DS40039C-page 125 ...

Page 128

... NOTES: DS40039C-page 126  2003 Microchip Technology Inc. ...

Page 129

... Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events  2003 Microchip Technology Inc. SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...

Page 130

... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS40039C-page 128 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS40039C  2003 Microchip Technology Inc. ...

Page 131

... Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2003 Microchip Technology Inc. PIC16F630/676 XXX Examples: Pattern a) PIC16F630 – E/P 301 = Extended Temp., PDIP package, 20 MHz, QTP pattern #301 b) PIC16F676 package, 20 MHz – I/SO = Industrial Temp., SOIC DS40039C-page 129 ...

Page 132

... Italy Microchip Technology SRL Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 United Kingdom Microchip Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 02/12/03  2003 Microchip Technology Inc. ...

Related keywords