PIC16F676-I/ST Microchip Technology Inc., PIC16F676-I/ST Datasheet - Page 61

• Manufacturer Part Number: PIC16F676-I/ST
• Description: 14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F676-I/ST

• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin TSSO
• Programmable Memory: 1.75K Bytes
• Ram Size: 64 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

9.3.5
The PIC16F630/676 members have on-chip Brown-out
Detect circuitry. A configuration bit, BODEN, can
disable (if clear/programmed) or enable (if set) the
Brown-out Detect circuitry. If V
greater than parameter (T
Section 12.0), the Brown-out situation will reset the
device. This will occur regardless of V
RESET is not guaranteed to occur if V
V
FIGURE 9-6:
9.3.6
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired.
Then, OST is activated. The total time-out will vary
based on oscillator configuration and PWRTE bit
status. For example, in EC mode with PWRTE bit
erased (PWRT disabled), there will be no time-out at
all. Figure 9-7, Figure 9-8 and Figure 9-9 depict time-
out sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 9-8). This is useful for testing purposes or
to synchronize more than one PIC16F630/676 device
operating in parallel.
Table 9-6 shows the RESET conditions for some
special registers, while Table 9-7 shows the RESET
conditions for all the registers.
 2003 Microchip Technology Inc.
BOD
Note 1: 72 ms delay only if PWRTE bit is programmed to ‘0’.
for less than parameter (T
BROWN-OUT DETECT (BOD)
TIME-OUT SEQUENCE
Internal
RESET
Internal
RESET
Internal
RESET
V
V
V
DD
DD
DD
BROWN-OUT SITUATIONS
BOD
DD
BOD
) in Table 12-4 (see
falls below V
).
DD
DD
slew-rate. A
falls below
BOD
for
<72 ms
72 ms
On any RESET (Power-on, Brown-out Detect,
Watchdog, etc.), the chip will remain in RESET until
V
Timer will now be invoked, if enabled, and will keep the
chip in RESET an additional 72 ms.
If V
running, the chip will go back into a Brown-out Detect
and the Power-up Timer will be re-initialized. Once V
rises above BV
72 ms RESET.
9.3.7
The power CONTROL/STATUS register, PCON
(address 8Eh) has two bits.
Bit0 is BOD (Brown-out). BOD is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent RESETS to see if BOD = 0, indicating
that a brown-out has occurred. The BOD STATUS bit is
a don’t care and is not necessarily predictable if the
brown-out circuit is disabled (by setting BODEN bit = 0
in the Configuration word).
Bit1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent RESET, if POR is ‘0’, it will indicate that a
Power-on Reset must have occurred (i.e., V
have gone too low).
(1)
DD
Note:
72 ms
72 ms
DD
rises above BV
drops below BV
(1)
(1)
A Brown-out Detect does not enable the
Power-up Timer if the PWRTE bit in the
configuration word is set.
POWER CONTROL (PCON) STATUS
REGISTER
DD
PIC16F630/676
, the Power-up Timer will execute a
DD
DD
(see Figure 9-6). The Power-up
while the Power-up Timer is
V
V
V
BOD
BOD
BOD
DS40039C-page 59
DD
may
DD