PIC16LF1826-I/ML Microchip Technology Inc., PIC16LF1826-I/ML Datasheet - Page 156

• Manufacturer Part Number: PIC16LF1826-I/ML
• Description: 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, n
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16LF1826-I/ML

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin QFN
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16(L)F1826/27
17.7
REGISTER 17-1:
REGISTER 17-2:
TABLE 17-1:
DS41391D-page 156
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-5
bit 4-0
FVRCON
DACCON0
DACCON1
Legend:
R/W-0/0
DACEN
Name
U-0
—
DAC Control Registers
— = unimplemented, read as ‘0’. Shaded cells are unused with the DAC module.
DACEN: DAC Enable bit
1 = DAC is enabled
0 = DAC is disabled
DACLPS: DAC Low-Power Voltage State Select bit
1 = DAC Positive reference source selected
0 = DAC Negative reference source selected
DACOE: DAC Voltage Output Enable bit
1 = DAC voltage level is also an output on the DACOUT pin
0 = DAC voltage level is disconnected from the DACOUT pin
Unimplemented: Read as ‘0’
DACPSS<1:0>: DAC Positive Source Select bits
00 = V
01 = V
10 = FVR Buffer2 output
11 = Reserved, do not use
Unimplemented: Read as ‘0’
DACNSS: DAC Negative Source Select bits
1 = V
0 = V
Unimplemented: Read as ‘0’
DACR<4:0>: DAC Voltage Output Select bits
DACEN
FVREN
SUMMARY OF REGISTERS ASSOCIATED WITH THE DAC MODULE
Bit 7
DACLPS
—
R/W-0/0
U-0
—
REF
SS
DACCON0: VOLTAGE REFERENCE CONTROL REGISTER 0
DACCON1: VOLTAGE REFERENCE CONTROL REGISTER 1
REF
DD
-
+ pin
FVRRDY
DACLPS
Bit 6
—
W = Writable bit
‘0’ = Bit is cleared
W = Writable bit
‘0’ = Bit is cleared
x = Bit is unknown
x = Bit is unknown
R/W-0/0
DACOE
U-0
—
Reserved
DACOE
Bit 5
—
R/W-0/0
U-0
Reserved
—
DACR4
Bit 4
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
CDAFVR1
DACPSS1
R/W-0/0
R/W-0/0
DACR3
Bit 3
DACPSS<1:0>
CDAFVR0
DACPSS0
DACR2
Bit 2
DACR<4:0>
R/W-0/0
R/W-0/0
ADFVR1
DACR1
Bit 1
 2011 Microchip Technology Inc.
—
R/W-0/0
U-0
—
DACNSS
ADFVR0
DACR0
Bit 0
DACNSS
R/W-0/0
R/W-0/0
Register
on page
138
156
156
bit 0
bit 0