PIC16F1939-I/P Microchip Technology Inc., PIC16F1939-I/P Datasheet - Page 157

• Manufacturer Part Number: PIC16F1939-I/P
• Description: 28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1939-I/P

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 28K Bytes
• Ram Size: 1K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V

TABLE 15-1:
FIGURE 15-2:
 2009 Microchip Technology Inc.
Legend:
Note 1:
Clock Source
ADC Clock Period (T
Fosc/16
Fosc/32
Fosc/64
Fosc/2
Fosc/4
Fosc/8
ADC
F
2:
3:
4:
RC
T
Set GO bit
CY
Holding capacitor is disconnected from analog input (typically 100 ns)
Shaded cells are outside of recommended range.
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
The ADC clock period (T
system clock F
device in Sleep mode.
- T
AD
Conversion starts
RC
ADCS<2:0>
ADC CLOCK PERIOD (T
T
AD
source has a typical T
000
100
001
101
010
110
x11
1 T
ANALOG-TO-DIGITAL CONVERSION T
AD
OSC
)
AD
b9
. However, the F
2 T
1.0-6.0 s
0.5 s
62.5ns
125 ns
AD
32 MHz
AD
b8
800 ns
1.0 s
2.0 s
3 T
) and total ADC conversion time can be minimized when the ADC clock is derived from the
(2)
(2)
(2)
AD
AD
(1,4)
b7
time of 1.6 s for V
4 T
RC
1.0-6.0 s
clock source must be used when conversions are to be performed with the
AD
AD
b6
100 ns
200 ns
400 ns
20 MHz
800 ns
5 T
1.6 s
3.2 s
) V
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Preliminary
AD
S
AD
(2)
(2)
(2)
b5
. DEVICE OPERATING FREQUENCIES
time.
(1,4)
6 T
DD
AD
1.0-6.0 s
b4
.
Device Frequency (F
Device Frequency (F
125 ns
250 ns
7 T
0.5 s
16 MHz
1.0 s
2.0 s
4.0 s
PIC16F193X/LF193X
AD
b3
(2)
(2)
(2)
AD
8
(1,4)
CYCLES
T
AD
b2
1.0-6.0 s
9 T
250 ns
500 ns
8.0 s
8 MHz
1.0 s
2.0 s
4.0 s
AD
b1
OSC
OSC
10
(3)
(2)
(2)
(1,4)
)
)
T
AD
b0
11
1.0-6.0 s
16.0 s
500 ns
8.0 s
4 MHz
1.0 s
2.0 s
4.0 s
(3)
(2)
(3)
(1,4)
DS41364D-page 157
1.0-6.0 s
16.0 s
32.0 s
64.0 s
8.0 s
1 MHz
2.0 s
4.0 s
(3)
(3)
(3)
(3)
(1,4)