PIC16F1939-I/P Microchip Technology Inc., PIC16F1939-I/P Datasheet - Page 342

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PIC16F1939-I/P

Manufacturer Part Number
PIC16F1939-I/P
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1939-I/P

A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Temperature Range
–40 to 125 °C
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V

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PIC16F193X/LF193X
26.5
The LCD driver module can be configured into one of
four multiplex types:
• Static (only COM0 is used)
• 1/2 multiplex (COM<1:0> are used)
• 1/3 multiplex (COM<2:0> are used)
• 1/4 multiplex (COM<3:0> are used)
The LMUX<1:0> bit setting of the LCDCON register
decides which of the LCD common pins are used (see
Table 26-4 for details).
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. If the pin is a COM drive,
then the TRIS setting of that pin is overridden.
TABLE 26-4:
26.6
The LCDSEn registers are used to select the pin
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
as one of the pin’s alternate functions. To configure the
pin as a segment pin, the corresponding bits in the
LCDSEn registers must be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEn
registers overrides any bit settings in the corresponding
TRIS register.
26.7
The LCDDATAx registers contain bits which define the
state of each pixel. Each bit defines one unique pixel.
Register 26-6 shows the correlation of each bit in the
LCDDATAx registers to the respective common and
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
26.8
The rate at which the COM and SEG outputs change is
called the LCD frame frequency.
DS41364D-page 342
Multiplex
Note:
Static
1/2
1/3
1/4
LCD Multiplex Types
Segment Enables
Pixel Control
LCD Frame Frequency
On a Power-on Reset, these pins are
configured as normal I/O, not LCD pins.
LMUX
<1:0>
00
01
10
11
COMMON PIN USAGE
Unused
Unused
Unused
COM3
Active
Unused
Unused
COM2
Active
Active
Unused
COM1
Active
Active
Active
Preliminary
TABLE 26-5:
TABLE 26-6:
Multiplex
Note:
LP<3:0>
Static
1/2
1/3
1/4
2
3
4
5
6
7
Clock source is F
LFINTOSC.
Clock source/(4 x 1 x (LP<3:0> + 1))
Clock source/(2 x 2 x (LP<3:0> + 1))
Clock source/(1 x 3 x (LP<3:0> + 1))
Clock source/(1 x 4 x (LP<3:0> + 1))
Static
FRAME FREQUENCY
FORMULAS
APPROXIMATE FRAME
FREQUENCY (IN Hz) USING
F
32.768 kHz OR LFINTOSC
85
64
51
43
37
32
OSC
Frame Frequency =
 2009 Microchip Technology Inc.
@ 8 MHz, TIMER1 @
1/2
85
64
51
43
37
32
OSC
/256, T1OSC or
114
1/3
85
68
57
49
43
1/4
85
64
51
43
37
32

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