DS92LV010ATMX/NOPB National Semiconductor, DS92LV010ATMX/NOPB Datasheet

IC TRANSCEIVER SINGLE BUS 8-SOIC

DS92LV010ATMX/NOPB

Manufacturer Part Number
DS92LV010ATMX/NOPB
Description
IC TRANSCEIVER SINGLE BUS 8-SOIC
Manufacturer
National Semiconductor
Type
Transceiverr
Datasheet

Specifications of DS92LV010ATMX/NOPB

Number Of Drivers/receivers
1/1
Protocol
LVDS
Voltage - Supply
3 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DS92LV010ATMX
*DS92LV010ATMX/NOPB
DS92LV010ATMX

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© 2007 National Semiconductor Corporation
DS92LV010A
Bus LVDS 3.3/5.0V Single Transceiver
General Description
The DS92LV010A is one in a series of transceivers designed
specifically for the high speed, low power proprietary bus
backplane interfaces. The device operates from a single 3.3V
or 5.0V power supply and includes one differential line driver
and one receiver. To minimize bus loading the driver outputs
and receiver inputs are internally connected. The logic inter-
face provides maximum flexibility as 4 separate lines are
provided (DIN, DE, RE, and ROUT). The device also features
flow through which allows easy PCB routing for short stubs
between the bus pins and the connector. The driver has 10
mA drive capability, allowing it to drive heavily loaded back-
planes, with impedance as low as 27 Ohms.
The driver translates between TTL levels (single-ended) to
Low Voltage Differential Signaling levels. This allows for high
speed operation, while consuming minimal power with re-
duced EMI. In addition the differential signaling provides com-
mon mode noise rejection of ±1V.
The receiver threshold is ±100mV over a ±1V common mode
range and translates the low voltage differential levels to stan-
dard (CMOS/TTL) levels.
Connection Diagram
Block Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
100052
Order Number DS92LV010ATM
See NS Package Number M08A
Features
Bus LVDS Signaling (BLVDS)
Designed for Double Termination Applications
Balanced Output Impedance
Lite Bus Loading 5pF typical
Glitch free power up/down (Driver disabled)
3.3V or 5.0V Operation
±1V Common Mode Range
±100mV Receiver Sensitivity
High Signaling Rate Capability (above 100 Mbps)
Low Power CMOS design
Product offered in 8 lead SOIC package
Industrial Temperature Range Operation
10005201
10005202
November 28, 2007
www.national.com

Related parts for DS92LV010ATMX/NOPB

DS92LV010ATMX/NOPB Summary of contents

Page 1

... The receiver threshold is ±100mV over a ±1V common mode range and translates the low voltage differential levels to stan- dard (CMOS/TTL) levels. Connection Diagram Block Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2007 National Semiconductor Corporation Features ■ Bus LVDS Signaling (BLVDS) ■ Designed for Double Termination Applications ■ ...

Page 2

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Enable Input Voltage (DE, −0. RE) Driver Input Voltage (DIN) −0. Receiver Output Voltage (R ) −0. OUT Bus Pin Voltage (DO/RI±) Driver Short Circuit Current ESD (HBM 1.5 kΩ ...

Page 3

DC Electrical Characteristics T = −40°C to +85°C unless otherwise noted Symbol Parameter V Output Differential Voltage OD ΔV V Magnitude Change Offset Voltage OS ΔV Offset Magnitude Change OS I Output Short Circuit ...

Page 4

Symbol Parameter t Disable Time High to Z PHZ t Disable Time Low to Z PLZ t Enable Time Z to High PZH t Enable Time Z to Low PZL DIFFERENTIAL RECEIVER TIMING REQUIREMENTS t Differential Prop. Delay High to ...

Page 5

Test Circuits and Timing Waveforms FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit FIGURE 3. Differential Driver Propagation Delay and Transition Time Waveforms FIGURE 1. Differential Driver DC Test Circuit 5 10005203 10005204 10005205 www.national.com ...

Page 6

FIGURE 6. Receiver Propagation Delay and Transition Time Test Circuit FIGURE 7. Receiver Propagation Delay and Transition Time Waveforms www.national.com FIGURE 4. Driver TRI-STATE Delay Test Circuit FIGURE 5. Driver TRI-STATE Delay Waveforms 6 10005206 10005207 10005208 10005209 ...

Page 7

FIGURE 8. Receiver TRI-STATE Delay Test Circuit FIGURE 9. Receiver TRI-STATE Delay Waveforms TRI-STATE Delay Waveforms Typical Bus Application Configurations Bi-Directional Half-Duplex Point-to-Point Applications Multi-Point Bus Applications 7 10005210 10005211 10005212 10005213 www.national.com ...

Page 8

Application Information There are a few common practices which should be implied when designing PCB for BLVDS signaling. Recommended practices are: • Use at least 4 layer PCB board (BLVDS signals, ground, power and TTL signals). • Keep drivers and ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted Order Number DS92LV010ATM See NS Package Number M08A 9 www.national.com ...

Page 10

... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock Conditioners www.national.com/timing Data Converters www.national.com/adc Displays www.national.com/displays Ethernet www.national.com/ethernet Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www ...

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