EVAL-AD9838SDZ Analog Devices Inc, EVAL-AD9838SDZ Datasheet - Page 6

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EVAL-AD9838SDZ

Manufacturer Part Number
EVAL-AD9838SDZ
Description
EVALUATION BOARD
Manufacturer
Analog Devices Inc
Series
-r
Datasheets

Specifications of EVAL-AD9838SDZ

Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9838
Primary Attributes
USB Powered or External Supply
Secondary Attributes
SPI Interface
Kit Application Type
Clock & Timing
Application Sub Type
Clock Generator
Kit Contents
Software CD, USB Cable
Silicon Manufacturer
Analog Devices
Silicon Core Number
AD9838
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
UG-268
SELECT EXTERNAL MCLK FREQUENCY
Having selected the digital interface specifics, next use the
EXTERNAL MCLK box to choose which frequency to use. The
boards are supplied with a 75 MHz general oscillator. If a different
clock source is required, the CLK1 SMB connector can be used
to supply a different MCLK value.
Two options for the general oscillator include the AEL3013
oscillators from AEL Crystals and the SG-310SCN oscillators
from Epson Electronics.
PROGRAMMING METHOD: HARDWARE OR
SOFTWARE
Functions that select frequency and phase registers, reset
internal registers, and power down the DAC can be implemented
using either software or hardware. Figure 7 shows how to select
the source of control for these functions. PIN/SW = 1 implies
that the functions are being controlled using the appropriate
hardware control pins. PIN/SW = 0 implies that the functions
are being controlled using the appropriate software control bits.
LOADING FREQUENCY AND PHASE REGISTERS
The desired output frequency and output phase can be loaded
using the inputs shown in Figure 8. Either the FREQ 0 register or
the FREQ 1 register can be loaded with frequency data. The
frequency data is loaded in megahertz, and the equivalent hex code
is shown to the right once data is entered; click Enter to load
data. Once data is loaded, the output appears on the IOUT1 and
IOUT2 pins. Similarly, either the PHASE 0 register or PHASE 1
register can be selected, and the phase data is loaded in degrees.
Figure 6. EXTERNAL MCLK Input
Figure 7. Programming Method
Rev. 0 | Page 6 of 12
The analog output frequency from the
where FREQREG is the value loaded into the selected frequency
register in decimals. This signal is phase shifted by
where PHASEREG is the value contained in the selected phase
register in decimals.
FSK AND PSK FUNCTIONALITY
In software mode, the AD9838 can be set up for FSK or PSK
functionality by simply entering the bit rate in milliseconds
and selecting the push-button option (see Figure 9).
WAVEFORM OPTIONS
The output waveform can be selected as a sinusoidal waveform
or a ramp waveform. The internal comparator in the AD9838
can be disabled or enabled (see Figure 10). The MSB or the
MSB/2 of the phase accumulator can be selected as the output
on the SIGN BIT OUT pin.
f
2π/4096 × PHASEREG
MCLK
/2
28
Figure 10. Waveform Profile and SIGN BIT OUT Pin
× FREQREG
Figure 8. Frequency and Phase Load
Figure 9. FSK and PSK Functionality
Evaluation Board User Guide
AD9838
is defined by

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