Z8623012PSG Zilog, Z8623012PSG Datasheet - Page 29

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Z8623012PSG

Manufacturer Part Number
Z8623012PSG
Description
IC SMART V-CHIP W/2ND I2C 18-DIP
Manufacturer
Zilog
Type
Video Decoderr
Datasheet

Specifications of Z8623012PSG

Applications
Set-Top Boxes, TV
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
Z8623x
Core
Z80
Data Bus Width
8 bit
Program Memory Type
CMOS
Maximum Clock Frequency
12 MHz
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / Rohs Status
 Details
6.1.8 Content Advisory Ratings Select Register 2
PS000401-TVC0699
R
D
N
video program possesses the corresponding MPAA Rating. The device outputs High onto
pin 13 only when a bit is set to High; it recovers the corresponding MPAA Rating in the
incoming video program.
This register holds the TV Parental Guidelines (Base Content) Content Advisory
selections made by the viewer.
T
D
is TV-Y-rated according to the TV Parental Guidelines Ratings standards, and this
bit is set to High.
D
is TV-Y7-rated according to the TV Parental Guidelines Ratings standards, and
this bit is set to High.
D
is TV-G-rated according to the TV Parental Guidelines Ratings standards, and this
bit is set to High.
D
gram is TV-PG-rated according to the TV Parental Guidelines Ratings standards,
and this bit is set to High.
D
is TV-14-rated according to the TV Parental Guidelines Ratings standards, and
this bit is set to High.
D
gram is TV-MA-rated according to the TV Parental Guidelines Ratings standards,
and this bit is set to High.
D
gram is TV-NONE-rated according to the TV Parental Guidelines Ratings stan-
dards, and this bit is set to High.
D
N
video program possesses the corresponding TV Parental Guidelines Rating. The device
outputs High onto pin 13 only when a bit is set to High; it recovers the corresponding TV
Bit
R/W
EGISTERS
ABLE
7
OTE
0
1
2
3
4
5
6
7
OTE
-Res.
-TV-Y.
-TV-Y7.
-TV-G.
-TV-PG.
-TV-14.
-TV-MA.
-TV-MA.
-Res.
:
:
The Z86230 outputs Low when a bit in this register is set to Low, and the incoming
The Z86230 outputs Low when a bit in this register is set to Low, and the incoming
19. C
Reserved. This bit must be kept Low(0).
Reserved. This bit must be kept Low(0).
S
The Z86230 outputs High on pin 13 when the incoming video program
The Z86230 outputs High on pin 13 when the incoming video program
The Z86230 outputs High on pin 13 when the incoming video program
UMMARY
The Z86230 outputs High on pin 13 when the incoming video program
The Z86230 outputs High on pin 13 when the incoming video pro-
The Z86230 outputs High on pin 13 when the incoming video pro-
The Z86230 outputs High on pin 13 when the incoming video pro-
ONTENT
res
R
7
Z86230—PRELIMINARY
A
NONE TV-MA TV-14
DVISORY
R
6
R/W
R
5
ATINGS
R/W
S
4
ELECT
TV-PG
R
R/W
EGISTER
3
TV-G
R/W
2 (A
2
C
DDRESS
ONTROL
TV-Y7
R/W
1
= 09h)
R
EGISTERS
TV-Y
R/W
0
29

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