ADV7197KSZ Analog Devices Inc, ADV7197KSZ Datasheet - Page 15

• Manufacturer Part Number: ADV7197KSZ
• Description: IC DAC VID-HDTV 3CH-11BIT 52MQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7197KSZ

• Applications: HDTV
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 52-MQFP, 52-PQFP
• Adc/dac Resolution: 11b
• Screening Level: Industrial
• Package Type: MQFP
• Pin Count: 52
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

MODE REGISTER 4
MR4 (MR47–MR40)
(Address (SR4–SR0) = 04H)
Figure 19 shows the various operations under the control of
Mode Register 4.
MR4 BIT DESCRIPTION
Timing Reset (MR40)
Toggling MR40 from low to high and low again resets the inter-
nal horizontal and vertical timing counters.
MODE REGISTER 5
MR5 (MR57–MR50)
(Address (SR4-SR0) = 05H)
Figure 20 shows the various operations under the control of
Mode Register 5.
MR5 BIT DESCRIPTION
Reserved (MR50)
This bit is reserved for the revision code.
RGB Mode (MR51)
When RGB mode is enabled (MR51 = “1”) the ADV7197
accepts unsigned binary RGB data at its input port. This control
is also available in Async Timing Mode.
Sync on PrPb (MR52)
By default the color component output signals Pr, Pb do not
contain any horizontal sync pulses. They can be inserted when
MR52 = “1.”
This control is not available in RGB mode.
MR57
MR47
MR56
MR46
ZERO MUST BE
WRITTEN TO
MR57–MR54
THESE BITS
THESE REGISTERS
MR55
MR45
ZERO MUST BE
MR47–MR41
WRITTEN TO
MR54
MR44
MR53
0
1
MR53
COLOR OUTPUT
MR43
Color Output Swap (MR53)
By default DAC B is configured as the Pr output and DAC C
as the Pb output. In setting this bit to “1” the DAC outputs
can be swapped around so that DAC B outputs Pb and DAC C
outputs Pr. The table below demonstrates this in more detail.
This control is also available in RGB mode.
Reserved (MR54–MR57)
A “0” must be written to these bits.
Table II. Relationship Between Color Input Pixel Port, MR53
and DAC B, DAC C Outputs
In 4:4:4 Input Mode
Color Data
Input on Pins
Cr9–0
Cb/Cr9–0
Cr9–0
Cb/Cr9–0
In 4:2:2 Input Mode
Color Data
Input on Pins
Cr9–0
Cb/Cr9–0
Cb/Cr9–0
SWAP
DAC B = Pr
DAC C = Pr
MR52
0
1
SYNC ON PrPb
MR52
MR42
DISABLE
ENABLE
MR51
0
1
MR51
MR41
RGB MODE
MR40
REVISION CODE
RESERVED FOR
DISABLE
ENABLE
TIMING RESET
MR50
MR50
MR40
MR53
0
0
1
1
MR53
0 or 1
0
1
ADV7197
Analog Output
Signal
DAC B
DAC C
DAC C
DAC B
Analog Output
Signal
Not Operational
DAC C (Pb)
DAC C (Pr)