ADV7191KST Analog Devices Inc, ADV7191KST Datasheet - Page 7

IC VIDEO ENCODER W/6DAC 64-LQFP

ADV7191KST

Manufacturer Part Number
ADV7191KST
Description
IC VIDEO ENCODER W/6DAC 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7191KST

Rohs Status
RoHS non-compliant
Applications
DVD, PC Video, Multimedia
Voltage - Supply, Analog
3.3 V ~ 5 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Number Of Dac's
6
Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
LQFP
Pin Count
64
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant

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REV. B
3.3 V TIMING CHARACTERISTICS
Parameter
MPU PORT
ANALOG OUTPUTS
CLOCK CONTROL AND PIXEL PORT
TELETEXT PORT
RESET CONTROL
PLL
NOTES
1
2
3
4
Specifications subject to change without notice.
Temperature range T
Guaranteed by characterization.
Pixel Port consists of:
Data: P15–P0 Pixel Inputs,
Control: HSYNC, VSYNC, BLANK,
Clock: CLKIN Input.
Teletext Port consists of:
Digital Output: TTXREQ,
Data: TTX.
SCLOCK Frequency
SCLOCK High Pulsewidth, t
SCLOCK Low Pulsewidth, t
Hold Time (Start Condition), t
Setup Time (Start Condition), t
Data Setup Time, t
SDATA, SCLOCK Rise Time, t
SDATA, SCLOCK Fall Time, t
Setup Time (Stop Condition), t
Analog Output Delay
DAC Analog Output Skew
f
Clock High Time, t
Clock Low Time, t
Data Setup Time, t
Data Hold Time, t
Control Setup Time, t
Control Hold Time, t
Digital Output Access Time, t
Digital Output Hold Time, t
Pipeline Delay, t
Pipeline Delay, t
Digital Output Access Time, t
Data Setup Time, t
Data Hold Time, t
RESET Low Time
PLL Output Frequency
CLOCK
MIN
15
15
(2¥ Oversampling)
(4¥ Oversampling)
4
12
18
to T
10
5
11
17
9
12
11
MAX
: 0∞C to 70∞C.
14
2
1
13
16
3
8
4
7
6
3
Min
0
0.6
1.3
0.6
0.6
100
0.6
8
8
6
4
2.5
3
(V
specifications T
Typ
2
8
0.1
27
13
12
57
67
11
3
6
3
54
AA
= 3.3 V
Max
400
300
300
20
150 mV, V
–7–
MIN
to T
Unit
kHz
ms
ms
ms
ms
ns
ns
ns
ms
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
Clock Cycles
ns
ns
ns
ns
MHz
MAX
REF
1
, unless otherwise noted
= 1.235 V, R
Test Conditions
After This Period, the First Clock is Generated
Relevant for Repeated Start Condition
SET1,2
= 1200
2
.)
, unless otherwise noted. All
ADV7190/ADV7191

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