MT47H128M8HQ-3E:E TR Micron Technology Inc, MT47H128M8HQ-3E:E TR Datasheet - Page 19

MT47H128M8HQ-3E:E TR

Manufacturer Part Number
MT47H128M8HQ-3E:E TR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet

Specifications of MT47H128M8HQ-3E:E TR

Organization
128Mx8
Density
1Gb
Address Bus
17b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions (Continued)
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
A1, E1, M9,
E9, G1, G7,
D2, D8, E7,
A9, C1, C3,
C7, C9, G3,
A7, B2, B8,
F2, F8, H2,
A3, E3, J3,
R8, R3, R7
Number
x16 Ball
N1, P9
A2, E2
A8, E8
R1, J9
G9
H8
J1
J2
J7
A3, E3, J1, K9
x4, x8 Ball
A9, C1, C3,
A7, B2, B8,
B1, B9, D1,
A1, E9, L1,
Number
D2, D8
A2, A8
B3, A2
C7, C9
L3, L7
H9
D9
E1
E2
E7
RDQS, RDQS# Output Redundant data strobe: For x8 only. RDQS is enabled/disabled
Symbol
VddQ
VssDL
VddL
VssQ
Vref
Vdd
RFU
Vss
NU
NU
NC
NF
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Type
Description
via the LOAD MODE command to the extended mode register
(EMR). When RDQS is enabled, RDQS is output with read data only
and is ignored during write data. When RDQS is disabled, ball B3
becomes data mask (see DM ball). RDQS# is only used when RDQS
is enabled and differential data strobe mode is enabled.
Power supply: 1.8V ±0.1V.
DQ power supply: 1.8V ±0.1V. Isolated on the device for im-
proved noise immunity.
DLL power supply: 1.8V ±0.1V.
SSTL_18 reference voltage (VddQ/2).
Ground.
DLL ground: Isolated on the device from Vss and VssQ.
DQ ground: Isolated on the device for improved noise immunity.
No connect: These balls should be left unconnected.
No function: x8: these balls are used as DQ4–DQ7; x4: they are no
function.
Not used: For x16 only. If EMR(E10) = 0, A8 and E8 are UDQS# and
LDQS#. If EMR(E10) = 1, then A8 and E8 are not used.
Not used: For x8 only. If EMR(E10) = 0, A2 and E8 are RDQS# and
DQS#. If EMR(E10) = 1, then A2 and E8 are not used.
Reserved for future use: Row address bits A13 (x16 only), A14,
and A15.
19
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Ball Assignments and Descriptions
1Gb: x4, x8, x16 DDR2 SDRAM
© 2004 Micron Technology, Inc. All rights reserved.

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