AT42QT1110-AU Atmel, AT42QT1110-AU Datasheet - Page 16

• Manufacturer Part Number: AT42QT1110-AU
• Description: IC TOUCH SENSOR 11KEY 32TQFP
• Manufacturer: Atmel
• Series: QTouch™r
• Type: Capacitiver

Specifications of AT42QT1110-AU

• Touch Panel Interface: 10, 2-Wire
• Number Of Inputs/keys: 11 Key
• Data Interface: Serial, SPI™
• Voltage Reference: Internal
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 8mA, 12mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Output Type: Logic
• Interface: SPI
• Input Type: Logic
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT42QT1110-AU; AT42QT1110-AUTR

4.1.6
4.1.6.1
4.1.6.2
4.1.6.3
16
AT42QT1110-MU/AT42QT1110-AU
Quick SPI Mode
Introduction
Quick SPI Report
Commands in Quick SPI Mode
In Quick SPI Mode, the QT1110 sends a 7-byte key report at each exchange. No host
commands are required over SPI in this mode; the host clocks the data bytes out in sequence.
The 7 report bytes are in the format given in
Table 4-1.
where:
Only two host commands are recognized under Quick SPI mode. These are shown in
Table 4-2.
CRC checking is not implemented in Quick SPI mode for host commands or return data.
Command
Store to EEPROM
Enable Full SPI
• Byte 0 is a counter that increments from 0 to 254 on successive exchanges to confirm that
• Bytes 1 – 3 indicate the detect status of channels 0 – 3, 4 – 7 and 8 – 10 respectively (two
• Bytes 4 – 6 indicate the error status of channels 0 – 3, 4 – 7 and 8 – 10 respectively (two bits
Byte
firmware is operating correctly.
bits per channel), as follows:
per channel), as follows:
0
1
2
3
4
5
6
– 00 = Channel not in detect
– 01 = Channel in detect
– 10 = Not Allowed
– 11 = Invalid Signal (Channel disabled)
– 00 = No error
– 01 = Not allowed
– 10 = Error on channel
– 11 = Invalid signal (channel disabled)
Description
Counter
Detect status, channels 0 – 3
Detect status, channels 4 – 7
Detect status, channels 8 – 10
Error status, channels 0 – 3
Error status, channels 4 – 7
Error status, channels 8 – 10
Device Status Report Format
Host Commands in Quick SPI Mode
Bit 7
Channel 3
Channel 7
Channel 3
Channel 7
Reserved
Reserved
Code
0x0A
0x36
Bit 6
Table
Counter – increments from 0 to 255
Purpose
Allows for “Quick SPI mode” to be stored as the
default start-up mode
Enables full SPI mode
4-1.
Bit 5
Channel 10
Channel 10
Channel 2
Channel 6
Channel 2
Channel 6
Bit 4
Bit 3
Channel 1
Channel 5
Channel 9
Channel 1
Channel 5
Channel 9
Bit 2
9520I–AT42–03/10
Bit 1
Channel 0
Channel 4
Channel 8
Channel 0
Channel 4
Channel 8
Table
Bit 0
4-2.