AT42QT1110-AU Atmel, AT42QT1110-AU Datasheet - Page 32

• Manufacturer Part Number: AT42QT1110-AU
• Description: IC TOUCH SENSOR 11KEY 32TQFP
• Manufacturer: Atmel
• Series: QTouch™r
• Type: Capacitiver

Specifications of AT42QT1110-AU

• Touch Panel Interface: 10, 2-Wire
• Number Of Inputs/keys: 11 Key
• Data Interface: Serial, SPI™
• Voltage Reference: Internal
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 8mA, 12mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Output Type: Logic
• Interface: SPI
• Input Type: Logic
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT42QT1110-AU; AT42QT1110-AUTR

7.8
7.9
32
Address 4: Positive Drift Compensation (PDRIFT)
Address 5: Positive Recalibration Delay (PRD)
AT42QT1110-MU/AT42QT1110-AU
PHYST: positive hysteresis. This setting provides a greater degree of control over the
implementation of the positive threshold recalibration. The positive hysteresis operates as a
“modifier” for the positive threshold. When a key signal is detected as being over the positive
threshold, the positive threshold is reduced by a factor corresponding to the positive hysteresis
so that the key will not go in and out of positive detection when the signal is on the borderline
between drift-compensation of a positive error or recalibration.
The settings for positive hysteresis are:
Default PTHR value:
Default PHYST value:
Table 7-7.
When changing ambient conditions cause a change in the key signal, the QT1110 will
compensate through its drift functions. “Positive Drift” refers to the case where the signal for a
key is greater than the reference.
Drift compensation occurs at a rate of 1 count per drift compensation period.
PDRIFT: the drift compensation period, in multiples of 160 ms. The valid range is 0 to 127,
where 0 disables positive drift compensation.
Note:
Default value:
Table 7-8.
If a key signal is determined to be above the positive threshold, the QT1110 will wait for this
delay and confirm that the error condition is still present before initiating a recalibration.
PRD: the positive recalibration delay, in multiples of 160 ms.
Note:
Default value:
Address
Address
4
5
00 = No change to positive threshold
01 = 12.5 percent reduction in positive-detect threshold
10 = 25% reduction in positive-detect threshold
11 = 37.5% reduction in positive-detect threshold
Drift compensation timing is paused while Drift Hold is activated, and continued when
Drift Hold has timed out.
All keys are recalibrated in the case of a positive recalibration.
Bit 7
Bit 7
Positive Drift Compensation
Positive Recalibration Delay
0
Bit 6
Bit 6
4 (4 counts above reference)
2 (25% positive hysteresis)
6 (960 ms)
6 (960 ms)
Bit 5
Bit 5
Bit 4
Bit 4
PRD
PDRIFT
Bit 3
Bit 3
Bit 2
Bit 2
Bit 1
Bit 1
9520I–AT42–03/10
Bit 0
Bit 0