DP83266VF National Semiconductor, DP83266VF Datasheet - Page 84
DP83266VF
Manufacturer Part Number
DP83266VF
Description
IC MEDIA ACSS CTRL INTF 160PQFP
Manufacturer
National Semiconductor
Datasheet
1.DP83266VF.pdf
(152 pages)
Specifications of DP83266VF
Applications
*
Voltage - Supply
4.75 V ~ 5.25 V
Package / Case
160-BFQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Interface
-
Other names
*DP83266VF
- Current page: 84 of 152
- Download datasheet (2Mb)
7 0 Control Information
7 7 EVENT COUNTERS
The Event Counters are used to gain access to the internal 20-bit counters used to gather statistics
The following event counters are included
7 7 1 Processing Procedures
The counters are 20-bit wrap-around counters except for the Late Count Counter which is a 4-bit sticky counter (see Figure 7-2 )
Since the Control Bus Interface is an 8-bit interface and the counters are 20 bits wide a register holding scheme is implemented
In order to provide a consistent snapshot of a counter while the least significant byte is read the upper 12 bits are loaded into a
holding register which can then be read The least significant byte must be read first
The Counters are always readable and are writable in Stop Mode The Counters are not reset as a result of a Master Reset This
may be done by either reading the Counters out and keeping track relative to the initial value read or by writing a value (Zero) to
all of the Counters in Stop Mode The Counters may be written in any order Interrupts may be requested when the counters
increment (except for Ring Latency Counter) or wrap-around (except for Ring Latency Counter and Late Count Counter)
Frame Received Counter (FRCT1–3)
Error Isolated Counter (EICT1–3)
Lost Frame Counter (LFCT1–3)
Frame Copied Counter (FCCT1–3)
Frame Not Copied Counter (FNCT1–3)
Frame Transmitted Counter (FTCT1–3)
Token Received Counter (TKCT1–3)
Ring Latency Counter (RLCT1–3)
Late Count Counter (LTCT)
(Continued)
FIGURE 7-2 Event Counters
84
TL F 11705 – 45
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