DP83848IVV National Semiconductor, DP83848IVV Datasheet - Page 36

• Manufacturer Part Number: DP83848IVV
• Manufacturer: National Semiconductor

Specifications of DP83848IVV

• Lead Free Status / Rohs Status: Compliant

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MISR will be set, denoting all currently pending interrupts.
Reading of the MISR clears ALL pending interrupts.
Example: To generate an interrupt on a change of link sta-
tus or on a change of energy detect power state, the steps
would be:
— Write 0003h to MICR to set INTEN and INT_OE
— Write 0060h to MISR to set ED_INT_EN and
— Monitor PWR_DOWN/INT pin
When PWR_DOWN/INT pin asserts low, user would read
the MISR register to see if the ED_INT or LINK_INT bits
are set, i.e. which source caused the interrupt. After read-
ing the MISR, the interrupt bits should clear and the
PWR_DOWN/INT pin will deassert.
LINK_INT_EN
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5.6 Energy Detect Mode
When Energy Detect is enabled and there is no activity on
the cable, the DP83848I will remain in a low power mode
while monitoring the transmission line. Activity on the line
will cause the DP83848I to go through a normal power up
sequence. Regardless of cable activity, the DP83848I will
occasionally wake up the transmitter to put ED pulses on
the line, but will otherwise draw as little power as possible.
Energy detect functionality is controlled via register Energy
Detect Control (EDCR), address 0x1Dh.