CY7C1340A-100AC Cypress Semiconductor Corp, CY7C1340A-100AC Datasheet - Page 7

• Manufacturer Part Number: CY7C1340A-100AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1340A-100AC

• Density: 4Mb
• Access Time (max): 5ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Supply Current: 225mA
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 32b
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05153 Rev. *C
AC Test Loads and Waveforms—3.3V I/O
DQ
AC Test Loads and Waveforms—2.5V I/O
Thermal Resistance
Switching Characteristics
Clock
tKC
tKH
tKL
Output Times
tKQ
tKQX
tKQLZ
tKQHZ
tOEQ
tOELZ
tOEHZ
Set-up Times
tS
Hold Times
tH
Notes:
21. Overshoot: VIH(AC) <VDD + 1.5V for t <tTCYC/2; undershoot: VIL(AC) < 0.5V for t <tTCYC/2; power-up: VIH < 2.6V and VDD <2.4V and VDDQ < 1.4V for
22. Test conditions as specified with the output loading as shown in (a) of AC Test Loads unless otherwise noted.
23. Output loading is specified with C
24. At any given temperature and voltage condition, t
25. OE is a “Don’t Care” when a byte Write enable is sampled LOW.
26. This is a synchronous device. All synchronous inputs must meet specified set-up and hold time, except for “don’t care” as defined in the truth table.
Parameter
t<200 ms.
Parameter
Θ
Θ
Z
JA
JC
DQ
0
= 50Ω
(a)
Thermal Resistance (Junction to Ambient) Still air, soldered on a 4.25 × 1.125 inch,
Thermal Resistance (Junction to Case)
= 1.5V
Z
0
50Ω
= 50Ω
Clock to Output Invalid
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Clock to Output Valid
Clock to Output in Low-Z
Clock to Output in High-Z
OE to Output Valid
OE to Output in Low-Z
OE to Output in High-Z
Address, Controls, and Data In
Address, Controls, and Data In
(a)
30 pF
V
V
t
t
= 1.25V
L
Description
= 5 pF as in part (b) of AC Test Loads.
DQ
50Ω
Over the Operating Range
5 pF
[25]
Description
(b)
KQHZ
[23, 24]
317Ω
[23, 24]
[23, 24]
[23, 24]
is less than t
3.3V
351Ω
[26]
[26]
[21]
3.0V
0V
KQLZ
≤ 1.5 ns
four-layer PCB
and t
[22]
10%
OEHZ
ALL INPUT PULSES
is less than t
90%
Test Conditions
Min.
(c)
2.5
0.5
10
4
4
2
3
0
2.5V
100 MHz
OELZ
0V
≤ 18 ns
-5
.
90%
Max.
10%
10%
5
5
4
5
≤ 1.5 ns
ALL INPUT PULSES
Vddm in
Vddtyp
90%
Min.
2.5
0.5
15
5
3
0
5
2
tP U = 200us
66 MHz
(c)
-7
TQFP Typ.
CY7C1340A
Max.
20
1
7
6
7
6
(d)
90%
Page 7 of 12
For proper RESE T
bring Vdd down to 0V
10%
≤ 1.8 ns
°C/W
°C/W
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns