TC55V16256FT-15

Manufacturer Part NumberTC55V16256FT-15
ManufacturerToshiba
TC55V16256FT-15 datasheet
 


Specifications of TC55V16256FT-15

Density4MbAccess Time (max)15ns
Sync/asyncAsynchronousArchitectureNot Required
Clock Freq (max)Not RequiredMHzOperating Supply Voltage (typ)3.3V
Address Bus18bPackage TypeTSOP-II
Operating Temp Range0C to 70CNumber Of Ports1
Supply Current190mAOperating Supply Voltage (min)3V
Operating Supply Voltage (max)3.6VOperating Temperature ClassificationCommercial
MountingSurface MountPin Count44
Word Size16bNumber Of Words256K
Lead Free Status / Rohs StatusNot Compliant  
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TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
The TC55V16256J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 262,144
words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it
operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode,
and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide lower and upper
byte access. This device is well suited to cache memory applications where high-speed access and high-speed
storage are required. All inputs and outputs are directly LVTTL compatible. The TC55V16256J/FT is available in
plastic 44-pin SOJ and TSOP with 400mil width for high density surface assembly.
FEATURES
Fast access time (the following are maximum values)
TC55V16256J/FT-12:12 ns
TC55V16256J/FT-15:15 ns
Low-power dissipation
(the following are maximum values)
Cycle Time
12
15
20
Operation (max)
220
190
160
Standby:4 mA (both devices)
PIN ASSIGNMENT
(TOP VIEW)
44 PIN SOJ
44 PIN TSOP
A4
1
44
A5
A4
A3
2
43
A6
A3
A2
3
42
A7
A2
A1
4
41
A1
OE
A0
5
40
A0
UB
6
39
CE
LB
CE
I/O1
7
38
I/O16
I/O1
I/O2
8
37
I/O15
I/O2
I/O3
9
36
I/O14
I/O3
I/O4
10
35
I/O13
I/O4
V
11
34
GND
V
DD
DD
GND
12
33
V
GND
DD
I/O5
13
32
I/O12
I/O5
I/O6
14
31
I/O11
I/O6
I/O7
15
30
I/O10
I/O7
I/O8
16
29
I/O9
I/O8
17
28
NU
WE
WE
A15
18
27
A8
A15
A14
19
26
A9
A14
A13
20
25
A10
A13
A12
21
24
A11
A12
A16
22
23
A17
A16
(TC55V16256J)
Single power supply voltage of 3.3 V ± 0.3 V
Fully static operation
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Data byte control using LB (I/O1 to I/O8) and
UB (I/O9 to I/O16)
25
ns
Package:
SOJ44-P-400-1.27 (J)
140
mA
TSOP II44-P-400-0.80 (FT)
PIN NAMES
1
44
A5
2
43
A6
3
42
A7
4
41
OE
5
40
UB
6
39
LB
7
38
I/O16
8
37
I/O15
9
36
I/O14
10
35
I/O13
11
34
GND
12
33
V
DD
13
32
I/O12
14
31
I/O11
15
30
I/O10
16
29
I/O9
17
28
NU
18
27
A8
19
26
A9
20
25
A10
21
24
A11
22
23
A17
(TC55V16256FT)
TC55V16256J/FT-12,-15
(Weight: 1.64 g typ)
(Weight: 0.45 g typ)
A0 to A17
Address Inputs
I/O1 to I/O16 Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
LB , UB
Data Byte Control Inputs
V
Power (+3.3 V)
DD
GND
Ground
NU
Not Usable (Input)
2002-01-07 1/11

TC55V16256FT-15 Summary of contents

  • Page 1

    ... I/O10 A10 21 24 A11 22 23 A17 (TC55V16256FT) TC55V16256J/FT-12,-15 (Weight: 1.64 g typ) (Weight: 0.45 g typ A17 Address Inputs I/O1 to I/O16 Data Inputs/Outputs CE Chip Enable Input WE Write Enable Input OE Output Enable Input Data Byte Control Inputs V Power (+3 GND Ground NU Not Usable (Input) ...

  • Page 2

    BLOCK DIAGRAM A13 A14 A15 A17 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O16 GENERATOR MAXIMUM RATINGS SYMBOL V Power Supply ...

  • Page 3

    DC RECOMMENDED OPERATING CONDITIONS SYMBOL V Power Supply Voltage DD V Input High Voltage IH V Input Low Voltage IL *: −1.0 V with a pulse width of 20%・t + 1.0 V with a pulse width of 20%・t **: V ...

  • Page 4

    OPERATING MODE MODE CE Read L Write L L Outputs Disable L Standby Don’t care Note: The NU pin must be left unconnected or tied to GND or a voltage level of less than 0.8 V. You ...

  • Page 5

    AC CHARACTERISTICS READ CYCLE SYMBOL PARAMETER t Read Cycle Time RC t Address Access Time ACC t Chip Enable Access Time CO t Output Enable Access Time OE t Upper Byte, Lower ...

  • Page 6

    TIMING DIAGRAMS (See Note 2) READ CYCLE Address Hi-Z OUT WRITE CYCLE CONTROLLED) Address OUT ACC ...

  • Page 7

    WRITE CYCLE CONTROLLED) Address Hi-Z OUT WRITE CYCLE CONTROLLED) Address Hi-Z OUT D IN ...

  • Page 8

    Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400 linear feet per minute. (2) WE remains HIGH for the Read Cycle. ( goes LOW coincident with or after WE goes LOW, the outputs will ...

  • Page 9

    PACKAGE DIMENSIONS SOJ44-P-400-1.27 Weight: 1.64 g (typ) TC55V16256J/FT-12,-15 2002-01-07 9/11 ...

  • Page 10

    PACKAGE DIMENSIONS Weight: 0.45 g (typ) TC55V16256J/FT-12,-15 2002-01-07 10/11 ...

  • Page 11

    ... TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property ...