PSB4860HV4.1 Lantiq, PSB4860HV4.1 Datasheet - Page 127
PSB4860HV4.1
Manufacturer Part Number
PSB4860HV4.1
Description
Manufacturer
Lantiq
Datasheet
1.PSB4860HV4.1.pdf
(324 pages)
Specifications of PSB4860HV4.1
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PSB4860HV4.1
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
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2.4.5.1
The supports up to two banks of memory which may be 4 bit or 8 bit wide (Figure 65).
If both banks are used, each one is connected identically with exception of the data lines
D
high.
Figure 65 ARAM/DRAM Interface - Connection Diagram
The also supports different internal organizations of ARAM/DRAM chips. Table 97
shows the necessary connections on the address bus.
Table 97
ARAM/DRAM
256k x4
512k x8
Data Sheet
0
- D
PSB 4860
MA
MD
7
. These must be connected as described by table 96. The pin FRDY must be tied
0
0
-MA
CAS
-MD
RAS
single 4 bit bank
ARAM/DRAM Interface
Address Line Usage (ARAM/DRAM Mode)
W
15
3
0
A
D
RAS
CAS
W
OE
0
0
-A
-D
PSB 4860
12
3
MA
0
CS9
-MA
CAS
RAS
MD
single 1 bit bank
1
1
W
15
0
0
1)
MA
A
A
0
0
127
-A
-A
0
-MA
8
8
A
D
RAS
CAS
W
OE
8
0
0
PSB 4860
-A
MA
12
MA
A
MD
9
0
0
-MA
CAS
9
-MD
RAS
single 8 bit bank
W
15
7
0
MA
10
MA
11
A
D
RAS
CAS
W
OE
0
0
MA
-A
-D
PSB 4860
12
7
2000-01-14
12
MA
13
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