ATA5811-PLQX Atmel, ATA5811-PLQX Datasheet - Page 56

• Manufacturer Part Number: ATA5811-PLQX
• Manufacturer: Atmel

Specifications of ATA5811-PLQX

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Lead Free Status / Rohs Status: Compliant

Figure 48. Receiving Mode (TMODE = 0)
56
ATA5811/ATA5812 [Preliminary]
Demod_Out
Bit check ok
0
Bit-check mode
0
0
If the TX/RX data buffer control logic detects the start bit, the data stream is written in
the TX/RX data buffer byte by byte. The start bit is part of the first data byte and must be
different from the bits of the preburst. If the preburst consists of a sequence of '00000...',
the start bit must be a 1. If the preburst consists of a sequence of '11111...', the start bit
must be a 0.
If the data stream consists of more than 16 bytes, a buffer overflow occurs and the
TX/RX data buffer control logic overwrites the bytes already stored in the TX/RX data
buffer. So it is very important to ensure that the data is read in time so that no buffer
overflow occurs in that case (see Figure 33 on page 45). There is a counter that indi-
cates the number of received bytes in the TX/RX data buffer (see section “Transceiver
Configuration”). If a byte is transferred to the microcontroller, the counter is decre-
mented, if a byte is received, the counter is incremented. The counter value is available
via the 4-wire serial interface.
An interrupt is issued, if the counter while counting forwards reaches the value defined
by the control bits IR0 and IR1 in control register 1.
If the TX/RX data buffer control logic detects a bit error, an interrupt is issued and the
transceiver is set back to the start-up mode (see Figure 40 on page 50, Figure 41 on
page 51and Figure 49 on page 57).
Bit error: a) t
Note:
Writing the control register 1, 4, 5 or 6 during receiving mode resets the TX/RX data
buffer control logic and the counter which indicates the number of received bytes. If the
bits OPM0 and OPM1 are still '1' after writing to a control register, the transceiver
changes to the start-up mode (start-up signal processing).
0
Preburst
0
0
The byte consisting of the bit error will not be stored in the TX/RX data buffer. Thus it is
not available via the 4-wire serial interface.
0
b) Logical error (no edge detected in the bit center)
T
0
ee
0
Start-
< T
bit
1
0
Lim_min
Readable via 4-wire serial interface
1
2T
MSB
Byte 1
0
1 1 1 1 0 0 1 1
1 0 1 0 0 0 0 0
TX/RX Data Buffer
or T
0
0
Lim_max
0
Receiving mode
0
LSB
< t
1
Byte 16, Byte 32, ...
Byte 15, Byte 31, ...
Byte 14, Byte 30, ...
Byte 13, Byte 29, ...
Byte 12, Byte 28, ...
Byte 11, Byte 27, ...
Byte 10, Byte 26, ...
Byte 9, Byte 25, ...
Byte 8, Byte 24, ...
Byte 7, Byte 23, ...
Byte 6, Byte 22, ...
Byte 5, Byte 21, ...
Byte 4, Byte 20, ...
Byte 3, Byte 19, ...
Byte 2, Byte 18, ...
Byte 1, Byte17, ...
ee
1
< T
1
Byte 2
1
Lim_min_2T
0
0
1
or t
1
0
ee
1
> T
0
Lim_max_2T
Byte 3
1
1
0
0
4689B–RKE–04/04