LMK03033CISQE National Semiconductor, LMK03033CISQE Datasheet - Page 21

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LMK03033CISQE

Manufacturer Part Number
LMK03033CISQE
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LMK03033CISQE

Lead Free Status / Rohs Status
Not Compliant

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3.0 Application Information
3.1 SYSTEM LEVEL DIAGRAM
Figure 3
application. In this setup the clock may be multiplied, recon-
ditioned, and redistributed. Both the OSCin/OSCin* and CLK-
outX/CLKoutX* pins can be used in a single-ended or a
differential fashion, which is discussed later in this datasheet.
The GOE pin needs to be high for the outputs to operate. One
technique sometimes used is to take the output of the LD
(Lock Detect) pin and use this as an input to the GOE pin. If
this is done, then the outputs will turn off if lock detect circuit
detects that the PLL is out of lock. The loop filter actually con-
shows an LMK03000 family device used in a typical
FIGURE 3. Typical Application
21
sists of seven components, but four of these components that
for the third and fourth poles of the loop filter are integrated in
the chip. The first and second pole of the loop filter are exter-
nal.
3.2 BIAS PIN
See section 1.1 for bias pin information.
3.3 LDO BYPASS
See section 1.2 for LDO bypass information.
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