71V124SA12PHG8 Integrated Device Technology (Idt), 71V124SA12PHG8 Datasheet - Page 3

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71V124SA12PHG8

Manufacturer Part Number
71V124SA12PHG8
Description
SRAM Chip Async Single 3.3V 1M-Bit 128K x 8 12ns 32-Pin TSOP-II T/R
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 71V124SA12PHG8

Package
32TSOP-II
Timing Type
Asynchronous
Density
1 Mb
Typical Operating Supply Voltage
3.3 V
Address Bus Width
17 Bit
Number Of I/o Lines
8 Bit
Number Of Ports
1
Number Of Words
128K
DC Electrical Characteristics
(V
AC Test Conditions
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and V
3. f
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout
DD
Symbol
MAX
I
I
I
SB1
CC
SB
= Min. to Max., V
= 1/t
I/O
RC
(all address inputs are cycling at f
Dynamic Operating Current
Dynamic Standby Power Supply Current
Full Standby Power Supply Current (static)
CS < V
CS > V
CS > V
LC
HC
HC
, Outputs Open, V
Figure 1. AC Test Load
, Outputs Open, V
, Outputs Open, V
Z
0
= 50Ω
LC
Parameter
= 0.2V, V
DD
DD
DD
DD
–0.2V (High).
= Max., f = f
= Max., f = f
= Max., f = 0
MAX
+1.5V
)
;
See Figure 1 and 2
f = 0 means no address input lines are changing.
GND to 3.0V
HC
50Ω
30pF
MAX
MAX
(3)
1.5V
1.5V
3ns
= V
3873 drw 03
(3)
(3)
(1, 2)
DD
3873 tbl 07
– 0.2V)
.
Com'l
145
45
10
6.42
71V124SA10
3
Ind
150
50
10
DATA
Com'l
130
71V124SA12
40
10
Commercial and Industrial Temperature Ranges
OUT
(for t
5pF*
Ind
140
*Including jig and scope capacitance.
40
CLZ
10
Figure 2. AC Test Load
, t
OLZ
Com'l
, t
100
71V124SA15
35
10
CHZ
, t
OHZ
120
, t
Ind
40
10
OW,
3.3V
and t
Com'l
320Ω
350Ω
71V124SA20
95
30
10
WHZ
3873 drw 04
)
Ind
115
35
10
3873 tbl 06
Unit
mA
mA
mA

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