PIC18F4585-H/PT Microchip Technology, PIC18F4585-H/PT Datasheet - Page 477

• Manufacturer Part Number: PIC18F4585-H/PT
• Description: IC MCU 8BIT 48KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4585-H/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 44-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timing Diagrams and Specifications ................................ 433
© 2007 Microchip Technology Inc.
Timer0 and Timer1 External Clock .......................... 437
Transition for Entry to Idle Mode ................................ 38
Transition for Entry to SEC_RUN Mode .................... 35
Transition for Entry to Sleep Mode ............................ 37
Transition for Two-speed Start-up
Transition for Wake from Idle to Run Mode ............... 38
Transition for Wake from Sleep (HSPLL) ................... 37
Transition from RC_RUN Mode to
Transition from SEC_RUN Mode to
Transition to RC_RUN Mode ..................................... 36
A/D Conversion Requirements ................................ 450
AC Characteristics
Capture/Compare/PWM Requirements ................... 438
CLKO and I/O Requirements ................................... 435
EUSART Synchronous Receive
EUSART Synchronous Transmission
Example SPI Mode Requirements
External Clock Requirements .................................. 433
High/Low-Voltage Detect Characteristics ................ 430
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock ................................................................. 434
Reset, Watchdog Timer, Oscillator Start-up
Timer0 and Timer1 External Clock
2
C Bus Data Requirements (Slave Mode) .............. 445
(INTOSC to HSPLL) ........................................ 354
PRI_RUN Mode ................................................. 36
PRI_RUN Mode (HSPLL) .................................. 35
Internal RC Accuracy ....................................... 434
Requirements .................................................. 448
Requirements .................................................. 448
Master Mode, CKE = 0 .................................... 440
Master Mode, CKE = 1 .................................... 441
Slave Mode, CKE = 0 ...................................... 442
Slave Mode, CKE = 1 ...................................... 443
Requirements .................................................. 446
(PIC18F4585/4680) ......................................... 439
Timer, Power-up Timer and Brown-out
Reset Requirements ........................................ 436
Requirements .................................................. 437
2
2
C Bus Data Requirements ................ 447
C Bus Start/Stop Bits
PIC18F2585/2680/4585/4680
Preliminary
Top-of-Stack Access .......................................................... 62
TRISE Register
TSTFSZ ........................................................................... 401
Two-Speed Start-up ................................................. 343, 354
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 429
W
Watchdog Timer (WDT) ........................................... 343, 352
WCOL ...................................................... 215, 216, 217, 220
WCOL Status Flag ................................... 215, 216, 217, 220
WWW Address ................................................................ 476
WWW, On-Line Support ...................................................... 5
X
XORLW ........................................................................... 401
XORWF ........................................................................... 402
PSPMODE Bit ......................................................... 138
Example Cases ......................................................... 66
BRGH Bit ................................................................. 231
Associated Registers ............................................... 353
Control Register ....................................................... 352
During Oscillator Failure .......................................... 355
Programming Considerations .................................. 352
DS39625C-page 475