AM186CC-50KD\W C AMD (ADVANCED MICRO DEVICES), AM186CC-50KD\W C Datasheet - Page 69

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AM186CC-50KD\W C

Manufacturer Part Number
AM186CC-50KD\W C
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM186CC-50KD\W C

Lead Free Status / Rohs Status
Compliant
Notes:
1. All timing parameters are measured at V
2. This timing must be met to guarantee recognition at the next clock.
No.
15
18
58
62
63
64
are with the load values shown in Table 35, “Pin List Summary,” on page A-12.
5
Symbol Description
t
t
(Normally Not-Ready System)
Notes:
1. In a normally not ready system, wait states are added after T3 until t
2. In a normally ready system, a wait state is added if t
CHCSX
t
t
t
t
t
CLHAV
CHCV
HVCL
CHCZ
CLAV
CLAZ
T3 are met.
(Normally Ready System)
AD address valid delay
AD address float delay
MCSx/PCSx inactive delay
HOLD setup
HLDA valid delay
Command lines float delay
Command lines valid delay (after float)
Parameter
CLKOUT
2
ARDY
ARDY
Am186™CC Communications Controller Data Sheet
Figure 25. Asynchronous Ready Waveforms
1
2
CC
/2 with 50-pF loading on CLKOUT unless otherwise noted. All output test conditions
Case 1
Case 2
Case 3
Case 4
Case 5
Table 17. Bus Hold Timing
1
1
1
2
1
Tw
T3
T2
T1
T1
Min
ARYCH
10
0
0
0
0
25 MHz
and t
51
Max
20
20
20
20
20
25
52
Tw
Tw
T3
T2
T2
ARYCHL
49
49
1
Min
ARYCH
0
0
0
5
0
during T2 or t
40 MHz
Preliminary
and t
Tw
Tw
Tw
T3
T3
50
50
Max
12
12
12
12
12
12
CLARX
ARYLCL
(Commercial Only)
Min
are met.
0
0
0
5
0
T4
T4
T4
Tw
T4
50 MHz
and t
CLARX
Max
10
10
10
10
10
10
T4
during
Unit
ns
ns
ns
ns
ns
ns
ns
69

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