DS21354LN+ Maxim Integrated Products, DS21354LN+ Datasheet - Page 33

IC TXRX E1 1-CHIP 3.3V 100-LQFP

DS21354LN+

Manufacturer Part Number
DS21354LN+
Description
IC TXRX E1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21354LN+

Function
Single-Chip Transceiver
Interface
E1, HDLC
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
RCR2: RECEIVE CONTROL REGISTER 2 (Address = 11 Hex)
SYMBOL
(MSB)
Sa8S
RBCS
RESE
Sa8S
Sa7S
Sa6S
Sa5S
Sa4S
POSITION
Sa7S
RCR2.7
RCR2.6
RCR2.5
RCR2.4
RCR2.3
RCR2.2
RCR2.1
RCR2.0
Sa6S
Sa8 Bit Select. Set to one to have RLCLK pulse at the Sa8 bit position;
set to zero to force RLCLK low during Sa8 bit position. See Section
for timing details.
Sa7 Bit Select. Set to one to have RLCLK pulse at the Sa7 bit position;
set to zero to force RLCLK low during Sa7 bit position. See Section
for timing details.
Sa6 Bit Select. Set to one to have RLCLK pulse at the Sa6 bit position;
set to zero to force RLCLK low during Sa6 bit position. See Section
for timing details.
Sa5 Bit Select. Set to one to have RLCLK pulse at the Sa5 bit position;
set to zero to force RLCLK low during Sa5 bit position. See Section
for timing details.
Sa4 Bit Select. Set to one to have RLCLK pulse at the Sa4 bit position;
set to zero to force RLCLK low during Sa4 bit position. See Section
for timing details.
Receive-Side Backplane Clock Select.
0 = if RSYSCLK is 1.544 MHz
1 = if RSYSCLK is 2.048/4.096/8.192 MHz
Receive-Side Elastic Store Enable.
0 = elastic store is bypassed
1 = elastic store is enabled
Not Assigned. Should be set to zero when written.
Sa5S
33 of 124
NAME AND DESCRIPTION
Sa4S
RBCS
RESE
(LSB)
18.1
18.1
18.1
18.1
18.1

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