DS92LV090A National Semiconductor, DS92LV090A Datasheet

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DS92LV090A

Manufacturer Part Number
DS92LV090A
Description
9 Channel Bus LVDS Transceiver
Manufacturer
National Semiconductor
Datasheet

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© 2001 National Semiconductor Corporation
DS92LV090A
9 Channel Bus LVDS Transceiver
General Description
The DS92LV090A is one in a series of Bus LVDS transceiv-
ers designed specifically for the high speed, low power
proprietary backplane or cable interfaces. The device oper-
ates from a single 3.3V power supply and includes nine
differential line drivers and nine receivers. To minimize bus
loading, the driver outputs and receiver inputs are internally
connected. The separate I/O of the logic side allows for loop
back support. The device also features a flow through pin out
which allows easy PCB routing for short stubs between its
pins and the connector.
The driver translates 3V TTL levels (single-ended) to differ-
ential Bus LVDS (BLVDS) output levels. This allows for high
speed operation, while consuming minimal power with re-
duced EMI. In addition, the differential signaling provides
common mode noise rejection of
The receiver threshold is less than
common mode range and translates the differential Bus
LVDS to standard (TTL/CMOS) levels. (See Applications
Information Section for more details.)
Simplified Functional Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
±
1V.
±
100 mV over a
DS100111
±
1V
Features
n Bus LVDS Signaling
n 3.2 nanosecond propagation delay max
n Chip to Chip skew
n Low power CMOS design
n High Signaling Rate Capability (above 100 Mbps)
n 0.1V to 2.3V Common Mode Range for V
n
n Supports open and terminated failsafe on port pins
n 3.3V operation
n Glitch free power up/down (Driver & Receiver disabled)
n Light Bus Loading (5 pF typical) per Bus LVDS load
n Designed for Double Termination Applications
n Balanced Output Impedance
n Product offered in 64 pin TQFP package
n High impedance Bus pins on power off (V
n Driver Channel to Channel skew (same device) 230ps
n Receiver Channel to Channel skew (same device)
typical
370ps typical
±
100 mV Receiver Sensitivity
±
800ps
DS100111-1
ID
CC
February 2001
www.national.com
= 200mV
= 0V)

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DS92LV090A Summary of contents

Page 1

... DS92LV090A 9 Channel Bus LVDS Transceiver General Description The DS92LV090A is one in a series of Bus LVDS transceiv- ers designed specifically for the high speed, low power proprietary backplane or cable interfaces. The device oper- ates from a single 3.3V power supply and includes nine differential line drivers and nine receivers. To minimize bus loading, the driver outputs and receiver inputs are internally connected ...

Page 2

... CC AGND 28, 33, 43, 49 29, 32, 42, 48 11, 38, 39 www.national.com Top View Order Number DS92LV090ATVEH See NS Package Number VEH064DB Input/Output I/O True Bus LVDS Driver Outputs and Receiver Inputs. I/O Complimentary Bus LVDS Driver Outputs and Receiver Inputs. I TTL Driver Input. O TTL Receiver Output. ...

Page 3

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Enable Input Voltage (DE, RE) Driver Input Voltage ( Receiver Output Voltage (R ) OUT ± Bus Pin Voltage (DO/RI ) ESD (HBM 1 100 pF) ...

Page 4

DC Electrical Characteristics Over recommended operating supply voltage and temperature ranges unless otherwise specified (Notes 2, 3) Symbol Parameter V Minimum Input High IH Voltage V Maximum Input Low IL Voltage I Input High Current IH I Input Low Current ...

Page 5

... In general, the faster the input edge rate, the better the AC performance. Note 7: The DS92LV090A functions within datasheet specification when a resistive load is applied to the driver outputs. Note 8: Propagation delays are guaranteed by design and characterization. ...

Page 6

Test Circuits and Timing Waveforms FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit FIGURE 3. Differential Driver Propagation Delay and Transition Time Waveforms www.national.com FIGURE 1. Differential Driver DC Test Circuit 6 DS100111-3 DS100111-4 DS100111-5 ...

Page 7

Test Circuits and Timing Waveforms FIGURE 4. Driver TRI-STATE Delay Test Circuit FIGURE 5. Driver TRI-STATE Delay Waveforms FIGURE 6. Receiver Propagation Delay and Transition Time Test Circuit FIGURE 7. Receiver Propagation Delay and Transition Time Waveforms (Continued) DS100111-6 DS100111-7 ...

Page 8

Test Circuits and Timing Waveforms Typical Bus Application Configurations Bi-Directional Half-Duplex Point-to-Point Applications www.national.com (Continued) FIGURE 8. Receiver TRI-STATE Delay Test Circuit FIGURE 9. Receiver TRI-STATE Delay Waveforms Multi-Point Bus Applications 8 DS100111-10 DS100111-11 DS100111-12 DS100111-13 ...

Page 9

... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. All dimensions are in millimeters 64-Lead Molded TQFP Package Order Number DS92LV090ATVEH NS Package Number VEH064DB 2. A critical component is any component of a life ...

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