74LVT244 Fairchild Semiconductor, 74LVT244 Datasheet

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74LVT244

Manufacturer Part Number
74LVT244
Description
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2005 Fairchild Semiconductor Corporation
74LVT244WM
74LVT244WMX_NL
(Note 1)
74LVT244SJ
74LVT244MSA
74LVT244MTC
74LVT244MTCX_NL
(Note 1)
74LVTH244WM
74LVTH244SJ
74LVTH244MSA
74LVTH244MTC
74LVTH244MTCX_NL
(Note 1)
74LVT244 • 74LVTH244
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVT244 and LVTH244 are octal buffers and line drivers
designed to be employed as memory address drivers,
clock drivers and bus oriented transmitters or receivers
which provide improved PC board density.
The LVTH244 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These octal buffers and line drivers are designed for low-
voltage (3.3V) V
provide a TTL interface to a 5V environment. The LVT244
and LVTH244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Order Number
CC
applications, but with the capability to
Package
Number
MSA20
MTC20
MTC20
MSA20
MTC20
MTC20
M20B
M20B
M20D
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
DS500154
Features
Input and output interface capability to systems at
5V V
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH244),
also available without bushold feature (74LVT244)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink
Functionally compatible with the 74 series 244
Latch-up performance exceeds 500 mA
ESD performance:
Human-body model
Machine model
Charged-device model
Package Description
CC
!
200V
!

32 mA/
2000V
!
1000V
July 1999
Revised March 2005

64 mA
www.fairchildsemi.com

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74LVT244 Summary of contents

Page 1

... Input and output interface capability to systems Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH244), also available without bushold feature (74LVT244) Live insertion/extraction permitted Power Up/Down high impedance provides glitch-free bus loading  Outputs source/sink ...

Page 2

Logic Symbol IEEE/IEC Connection Diagram www.fairchildsemi.com Pin Descriptions Pin Names Description 3-STATE Output 1 2 Enable Inputs I –I Inputs –O Output 0 7 Truth Tables Inputs Outputs OE I (Pins 12, 14, 16, ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current Supply Current ...

Page 4

DC Electrical Characteristics Symbol Parameter V Input Clamp Diode Voltage IK V Input HIGH Voltage IH V Input LOW Voltage IL V Output HIGH Voltage OH V Output LOW Voltage OL I Bushold Input Minimum Drive I(HOLD) (Note 5) I ...

Page 5

AC Electrical Characteristics Symbol Parameter t Propagation Delay Data to Output PLH t PHL t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ t Output to Output Skew OSHL t (Note 12) OSLH q Note ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide www.fairchildsemi.com Package Number MSA20 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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