W83194R-17 Winbond, W83194R-17 Datasheet

no-image

W83194R-17

Manufacturer Part Number
W83194R-17
Description
100 MHz AGP clock for SIS chipset
Manufacturer
Winbond
Datasheet
1.0 GENERAL DESCRIPTION
The W83194R-17/-17A is a Clock Synthesizer which provides all clocks required for high-speed RISC
or CISC microprocessor such as Intel PentiumII, PentiumPro , AMD or Cyrix. Eight different
frequency of CPU, AGP and PCI clocks are externally selectable with smooth transitions. The
W83194R-17/-17A provides AGP clocks especially for clone chipset.
provided by the W83194R-17 is up to 100MHz, but the one of W83194R-17A is up to 133MHz.
The W83193R-17/-17A provides I
each clock outputs and choose the 0.5% or 1.5% center type spread spectrum to reduce EMI.
The W83194R-17/-17A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V
supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate
into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads
as maintaining 50 ¡ Ó 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz
provide better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
(mode as Tri-state or Normal )
Supports Pentium , Pentium
4 CPU clocks
12 SDRAM clocks for 3 DIMMs
Two AGP clocks
6 PCI synchronous clocks.
Optional single or mixed supply:
(Vdd = Vddq3 = Vddq2 = Vddq2b = 3.3V) or (Vdd =Vddq2 = Vddq3 = 3.3V, Vddq2b = 2.5V)
I
Programmable registers to enable/stop each output and select modes
MODE pin for power Management
48 MHz for USB
24 MHz for super I/O
48-pin SSOP package
Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns, AGP to CPU sync. skew 0 ns (250 ps)
Smooth frequency switch with selections from 60 MHz to 133 MHz CPU
¡Ó 0.5% or ¡Ó 1.5% center type spread spectrum function to reduce EMI
2
C 2-Wire serial interface and I
2
C serial bus interface to program the registers to enable or disable
2
Pro, Pentium
C read back
100MHZ AGP CLOCK FOR SIS CHIPSET
- 1 -
II, AMD and Cyrix CPUs with I
Publication Release Date: Sep. 1998
W83194R-17/-17A
The highest CPU frequency
2
C.
Revision 0.20

Related parts for W83194R-17

W83194R-17 Summary of contents

Page 1

... CPU, AGP and PCI clocks are externally selectable with smooth transitions. The W83194R-17/-17A provides AGP clocks especially for clone chipset. provided by the W83194R- 100MHz, but the one of W83194R-17A 133MHz. The W83193R-17/-17A provides I each clock outputs and choose the 0.5% or 1.5% center type spread spectrum to reduce EMI. ...

Page 2

... Vdd 2 3 Vss Xin 4 Xout Vss AGP0 16 Vss Vss W83194R-17/-17A PRELIMINARY 48MHz 24MHz REF(0:1) 2 AGP(0:1) 2 CPUCLK(0:3) 4 SDRAM(0:11 PCICLK(0:4) 5 PCICLK_F Vddq2 48 AGP1 47 46 REF1 45 Vss CPUCLK0 44 CPUCLK1 43 Vddq2b 42 41 CPUCLK2 40 CPUCLK3 ...

Page 3

... SDRAM clock outputs which have the same frequency as CPU clocks. 7 I/O Latched input for FS1 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. Free running PCI clock during normal operation W83194R-17/-17A PRELIMINARY FUNCTION FUNCTION Publication Release Date: Sep. 1998 Revision 0.20 ...

Page 4

... I/O during normal operation. 26 I/O Internal 250k Latched input for FS0 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. 48MHz output for USB during normal operation W83194R-17/-17A PRELIMINARY FUNCTION FUNCTION 2 C 2-wire control interface 2 C 2-wire control interface FUNCTION pull-up ...

Page 5

... Power Pins SYMBOL Vdd Vddq2 Vddq2b Vddq3 6,14,19, 30, 36 Vss 3,9,16,22,27, 6.0 FREQUENCY SELECTION 6.1 W83194R-17 FREQUECY TABLE FS2 FS1 FS0 6.2 W83194R-17A FREQUECY TABLE FS2 FS1 FS0 ...

Page 6

... CPU 3.3#_2.5 BUFFER SELECTION CPU 3.3#_2.5 ( Pin 2 ) Input Level 1 0 W83194R-17/-17A CPU Operate at VDD = 2.5V VDD = 3.3V Publication Release Date: Sep. 1998 - 6 - PRELIMINARY Revision 0.20 ...

Page 7

... The W83194R-17/-17A may be disabled in the low state according to the following table in order to reduce power consumption. All clocks are stopped in the low state, but maintain a valid high period on transitions from running to stop ...

Page 8

... SSEL0 ( Frequency table selection by software via Selection by hardware 1 = Selection by software Spread Spectrum center spread type 1 = Spread Spectrum down spread type 0 = Normal 1 = Spread Spectrum enabled 0 = Running 1 = Tristate all outputs - 8 - W83194R-17/-17A PRELIMINARY Byte0,1,2... Ack until Stop Byte2, 3, 4... Ack until Stop Description 2 ...

Page 9

... W83194R-17 Frequency table selection by software via I SSEL2 SSEL1 SSEL0 W83194R-17A Frequency table selection by software via I SSEL2 SSEL1 SSEL0 ...

Page 10

... PCICLK2 (Active / Inactive) PCICLk1 (Active / Inactive) PCICLK0 (Active / Inactive) Description SDRAM7 (Active / Inactive) SDRAM6 (Active / Inactive) SDRAM5 (Active / Inactive) SDRAM4 (Active / Inactive) SDRAM3 (Active / Inactive) SDRAM2 (Active / Inactive) SDRAM1 (Active / Inactive) SDRAM0 (Active / Inactive W83194R-17/-17A PRELIMINARY Publication Release Date: Sep. 1998 Revision 0.20 ...

Page 11

... SDRAM10 (Active / Inactive) SDRAM9 (Active / Inactive) SDRAM8 (Active / Inactive) Description Reserved Reserved Reserved AGP1 (Active / Inactive) Reserved Reserved REF1 (Active / Inactive) REF0 (Active / Inactive) Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved - 11 - W83194R-17/-17A PRELIMINARY Publication Release Date: Sep. 1998 Revision 0.20 ...

Page 12

... JA BW 500 J 0.4 1.6 t TLH t THL V 0.7 1.5 over V 0.7 2.1 RBE - 12 - W83194R-17/-17A PRELIMINARY Rating - 0 7 150 125 + Units Test Conditions % Measured at 1. Load Measured at 1. Load Measured at 1. KHz Load on CPU and PCI ...

Page 13

... 0 2 Ioz 10 I dd3 I dd2 CPUS3 CPUS2 I PD3 - 13 - W83194R-17/-17A PRELIMINARY = + Units Test Conditions All outputs V dc All outputs using 3.3V power CPU = 66.6 MHz PCI = 33.3 Mhz with load mA Same as above ...

Page 14

... OH(min) -27 OH(max) I OL(min OL(max) 0.4 RF(min) 1.6 RF(max) Min Typ Max -29 OL(min) 28 OL(max) 0.4 RF(min) 1.8 RF(max W83194R-17/-17A PRELIMINARY Units Test Conditions mA Vout = 1 Vout = 2.0V mA Vout = 1 Vout = 0 Load Load Units Test Conditions mA Vout = 1 Vout = 2.7V mA Vout = 1 Vout = 0.2 V ...

Page 15

... Typ Max -46 OL(min) 53 OL(max) 0.5 RF(min) 1.3 RF(max) Min Typ Max -33 -33 30 OL(min) 38 OL(max) 0.5 RF(min) 2.0 RF(max W83194R-17/-17A PRELIMINARY Units Test Conditions mA Vout = 1 Vout = 3.135V mA Vout = 1. Vout = 0 Load Load Units Test Conditions mA Vout = 1.65V mA Vout = 3.135V mA Vout = 1. Vout = 0 ...

Page 16

... PCI clocks are stopped. The PCI clocks will always be stopped in a low state and resume output with full pulse width. In this case, PCI “ c locks on latency “ is less than 1 PCI clocks and “ c locks off latency ” is less then 1 PCI clocks W83194R-17/-17A PRELIMINARY Publication Release Date: Sep. 1998 Revision 0.20 ...

Page 17

... Output Output pull-low tri-state Within 3ms Input Output Output Output pull-low tri-state @3.3V ) inside. The default state will be logic resistor is connected to ground if a logic - 17 - W83194R-17/-17A PRELIMINARY Vdd resistor is recommended to be the series Publication Release Date: Sep. 1998 Revision 0.20 ...

Page 18

... Terminating Resistor Device Pin 10k Ground Programming Header Vdd Pad Ground Pad Series 10k Terminating Resistor Device Pin - 18 - W83194R-17/-17A PRELIMINARY Clock Trace EMI Reducing Cap Optional Ground Clock Trace EMI Reducing Cap Optional Ground Publication Release Date: Sep. 1998 ...

Page 19

... Ferrite Bead ’s (FB) are recommended to further reduce the power supply noise. 5.The power supply race to the Vdd pins must be thick enough so that voltage drops across the trace resistance is negligible. FB1 Vdd Vdd Plane (3.3V) C1 C31 C32 C33 C34 W83194R-17/-17A Vdd2 Plane ...

Page 20

... W83194R-17A 28051234 814GBB 1st line: Winbond logo and the type number: W83194R-17/-17A 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 814 814: packages made in '98, week 14 G: assembly house ID ...

Page 21

... Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sale. W83194R-17/-17A Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II 123 Hoi Bun Rd., Kwun Tong ...

Related keywords