W83194R Winbond Electronics Corp America, W83194R Datasheet

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W83194R

Manufacturer Part Number
W83194R
Description
Description = 166MHz SiS540/630 Clock Gen., 3-DIMM, With S.S.T. ;; Package = Ssop 48
Manufacturer
Winbond Electronics Corp America
Datasheet

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Please note that all data and specifications are subject to change without notice. All the trademarks of
products and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where
malfunction of these products can reasonably be expected to result in personal injury. Winbond
customers using or selling these products for use in such applications do so at their own risk and
agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
Pages
n.a.
n.a.
02/Apr
Dates
Version
1.0
Data Sheet Revision History
On Web
W83194R-630A
Version
n.a.
1.0
- 1 -
All of the versions before 0.50 are for internal use.
Change version and version on web site to 1.0
166MHZ CLOCK FOR SIS CHIPSET
Publication Release Date: May.2000
Main Contents
W83194R-630A
Revision 1.0

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W83194R Summary of contents

Page 1

... Winbond for any damages resulting from such improper use or sales. 166MHZ CLOCK FOR SIS CHIPSET W83194R-630A Data Sheet Revision History Version On Web n.a. All of the versions before 0.50 are for internal use. 1.0 Change version and version on web site to 1 W83194R-630A Main Contents Publication Release Date: May.2000 Revision 1.0 ...

Page 2

... W83194R-630A provides the 0.5%, 0.75% center type and 0~0.5% down type spread spectrum to reduce EMI. The W83194R-630A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as maintaining 50± ...

Page 3

... W83194R-630A 48MHz 24_48MHz REF(0:1) 2 CPUCLK(0:2) 3 SDRAM(0:13) 14 PCICLK(0:6) 7 REF1 VddLCPU CPUCLK_F CPUCLK0 Vss CPUCLK1 VddSD SDRAM12 SDRAM_F Vss SDRAM11 SDRAM 10 VddSD SDRAM 9 SDRAM 8 Vss SDRAM 7 SDRAM 6 VddSD ...

Page 4

... CPU clocks. PD# input pin when MODE=0. OUT SDRAM clock outputs which have syn. or asyn. frequencies as CPU clocks I/O Latched input for FS1 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks W83194R-630A FUNCTION FUNCTION Publication Release Date:May. 2000 Revision 1.0 ...

Page 5

... I/O Internal 250kΩ pull-up. Latched input for FS0 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. 48MHz output for USB during normal operation W83194R-630A FUNCTION 2 C 2-wire control interface 2 C 2-wire control interface FUNCTION Publication Release Date:May. 2000 ...

Page 6

... W83194R-630A FUNCTION PCI (MHz) REF (MHz) IOAPIC 33.4 14.318 33.4 14.318 14.318 33.2 33.4 14.318 37.5 14.318 33.4 14.318 33.4 14.318 33.4 14.318 33.4 14.318 32.3 14.318 32.3 14.318 31.7 14.318 14.318 35 37.3 14.318 32 ...

Page 7

... All proceeding bytes must be sent to change one of the control bytes. The 2-wire control interface allows each clock output individually enabled or disabled. W83194R-630A initializes with default register settings, and then it ptional to use the 2-wire control interface. The SDATA signal only changes when the SDCLK signal is low, and is stable when SDCLK is high during normal data transfer ...

Page 8

... SSEL1 (for frequency table selection by software via I SSEL0 (for frequency table selection by software via Selection by hardware 1 = Selection by software I SSEL3 (for frequency table selection by software via Normal 1 = Spread Spectrum enabled 0 = Running 1 = Tristate all outputs - 8 - W83194R-630A PCI (MHz) REF (MHz) IOAPIC 33.4 14.318 33.4 14.318 33.2 14.318 33 ...

Page 9

... PCICLK3 (Active / Inactive) PCICLK2 (Active / Inactive) PCICLK1 (Active / Inactive) PCICLK0 (Active / Inactive Pin25 24_48MHz = 24MHz 0 Pin25 24_48MHz = 48MHz - Latched FS0# 48MHz (Active / Inactive) 24-48MHz (Active / Inactive) - Reserved - Reserved REF1 (Active / Inactive) 2 REF0X2 (Active / Inactive W83194R-630A Description Description Description Publication Release Date:May. 2000 Revision 1.0 ...

Page 10

... SDRAM5 (Active / Inactive) SDRAM4 (Active / Inactive) SDRAM3 (Active / Inactive) SDRAM2 (Active / Inactive) SDRAM1 (Active / Inactive) SDRAM0 (Active / Inactive) Description Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip W83194R-630A Publication Release Date:May. 2000 Revision 1.0 ...

Page 11

... W83194R-630A 10. HOW TO READ THE TOP MARKING W83194R-630A 28051234 942GED 1st line: Winbond logo and the type number: W83194R-630A 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 942 942: packages made in '99, week 42 G: assembly house ID ...

Page 12

... Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II 123 Hoi Bun Rd., Kwun Tong Kowloon, Hong Kong TEL: 852-27516023-7 FAX: 852-27552064 Publication Release Date:May. 2000 - 12 - W83194R-630A Winbond Electronics (North America) Corp. 2730 Orchard Parkway San Jose, CA 95134 U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Revision 1.0 ...

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