LM4871N National Semiconductor, LM4871N Datasheet - Page 11

• Manufacturer Part Number: LM4871N
• Description: IC AMP AUDIO PWR 3W MONO AB 8DIP
• Manufacturer: National Semiconductor
• Series: Boomer®r
• Type: Class ABr

Specifications of LM4871N

• Output Type: 1-Channel (Mono)
• Max Output Power X Channels @ Load: 3W x 1 @ 3 Ohm
• Voltage - Supply: 2 V ~ 5.5 V
• Features: Shutdown, Thermal Protection
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM4871N; *LM4871N/NOPB; LM4871N/NOPB

Application Information
lows the LM4871 to reproduce peaks in excess of 1W with-
out producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 4.
From Equation 4, the minimum A
Since the desired input impedance was 20kΩ, and with a
A
allocation of R
Demonstration Board Layout
VD
FIGURE 2. Recommended LD PC Board Layout:
FIGURE 3. Recommended LD PC Board Layout:
impedance of 2, a ratio of 1.5:1 of R
i
Component-Side Silkscreen
= 20kΩ and R
Component-Side Layout
R
f
/R
i
= A
VD
f
= 30kΩ. The final design step
/2
VD
is 2.83; use A
(5)
f
(Continued)
to R
i
results in an
VD
10000829
10000830
= 3.
(4)
11
is to address the bandwidth requirements which must be
stated as a pair of −3dB frequency points. Five times away
from a −3dB point is 0.17dB down from passband response
which is better than the required
As stated in the External Components section, R
junction with C
The high frequency pole is determined by the product of the
desired frequency pole, f
With a A
150kHz which is much smaller than the LM4871 GBWP of
4MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4871 can still be used without running into bandwidth
limitations.
FIGURE 4. Recommended LD PC Board Layout:
f
f
C
L
H
i
= 100Hz/5 = 20Hz
= 20kHz * 5 = 100kHz
≥ 1/(2π*20kΩ*20Hz) = 0.397µF; use 0.39µF
VD
= 3 and f
i
create a highpass filter.
Bottom-Side Layout
H
= 100kHz, the resulting GBWP =
H
, and the differential gain, A
±
0.25dB specified.
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10000831
i
in con-
VD
.