TE28F640J3C-150 Intel Corporation, TE28F640J3C-150 Datasheet - Page 21

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TE28F640J3C-150

Manufacturer Part Number
TE28F640J3C-150
Description
TE28F640J3C-150Intel StrataFlash Memory (J3)
Manufacturer
Intel Corporation
Datasheet
Table 7. DC Voltage Characteristics
Symbol
V
during Block Erase,
PEN
V
PENH
Program, or Lock-Bit Operations
V
V
Lockout Voltage
LKO
CC
NOTES:
1. Includes STS.
2. Sampled, not 100% tested.
3. Block erases, programming, and lock-bit configurations are inhibited when V
and not guaranteed in the range between V
(max).
4. Typically, V
is connected to V
PEN
5. Block erases, programming, and lock-bit configurations are inhibited when V
not guaranteed in the range between V
6. Includes all operational modes of the device including standby and power-up sequences.
7. VCC operating condition for standby has to meet typical operationg coditons.
Datasheet
Parameter
Min
Max
2.7
3.6
2.0
(max) and V
PENLK
(2.7 V–3.6 V).
CC
(min) and V
(min), and above V
LKO
CC
256-Mbit J3 (x8/x16)
Unit
Test Conditions
Notes
V
3,4
V
5
≤ V
,
PEN
PENLK
(min), and above V
PENH
PENH
< V
, and
CC
LKO
(max).
CC
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