LSI402ZX LSI Computer Systems, Inc., LSI402ZX Datasheet

LSI402ZX

Manufacturer Part Number

LSI402ZX

Description

LSI402ZXLSI402ZX digital signal processor

Manufacturer

LSI Computer Systems, Inc.

Datasheet

1.LSI402ZX.pdf (2 pages)

Specifications of LSI402ZX

Case

BGA

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ZSP Architecture Performance with High-End Integration

Overview

The LSI402ZX is a high-performance 16-bit fixed-point digital signal processor

(DSP) based on the ZSP

applications that require high data throughput capability coupled with high-speed

I/O, such as communications infrastructure equipment, and offers enhanced I/O

capabilities and large on-chip memory. The LSI402ZX is capable of a maximum

clock rate of 200 MHz for 800 MIPS peak performance and sustained effective

throughput of 400 MMACs.

Memory

The internal memory structure of the LSI402ZX comprises 62K words of data

RAM, 62K words of instruction RAM, 2K words of boot ROM, and 2K words of

data space dedicated to memory-mapped registers and external peripherals. The

boot ROM contains several routines, including internal self-test, and boot-loader

routines. The Memory Interface Unit (MIU) provides a glueless interface to

industry-standard 32-bit synchronous-burst SRAMs (SBSRAMs), and 16-bit

asynchronous SRAMs and ROM devices. The total address range of the MIU is

20 bits, organized as sixteen 64K word pages which are selected by a software-

controlled page register.

LSI402ZX Digital Signal Processor

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Architecture. This device has been designed for

Functional Block Diagram

Features

•

Benefits

•

200 MHz operation at 1.8 V (5 ns cycle time)

Two high-speed serial/TDM ports (T1/E1

framer, H.100/H.110 bit stream compatible)

Low power dissipation (800 mW at

200 MHz)

62K words data RAM

62K words instruction RAM

2K words ROM

Eight-channel DMA support

On-board PLL for clock generation

32-/16-bit external memory interface

Two on-board timers

16-bit host processor interface

IEEE 1149.1-compliant JTAG port for real-

time emulation and system download

400 MMAC sustained DSP performance at

200 MHz

Direct interfacing to standard

telecommmunication interfaces, reducing

system cost

Low power per channel

Low or zero system memory cost

High data throughput without processor

overhead

Flexibility to optimize power consumption

High data bandwidth to off-chip devices

RTOS support and increased system

integration

Simple interfacing to industry-standard

micros

Low overhead on chip debug

Very high processing density per unit

area

Related parts for LSI402ZX

LSI402ZX Summary of contents

Page 1

... I/O, such as communications infrastructure equipment, and offers enhanced I/O capabilities and large on-chip memory. The LSI402ZX is capable of a maximum clock rate of 200 MHz for 800 MIPS peak performance and sustained effective throughput of 400 MMACs. ...

Page 2

... LSI402ZX Digital Signal Processor DMA The DMA controller of the LSI402ZX can support up to eight individual channels, where all channels can access the entire 64K word data RAM and 64K word instruc- tion RAM. Either instructions or data can be transferred to or from the internal memory space from the MIU, HPI, or either serial port. The eight DMA channels are segmented into four “ ...

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