21285-AB Intel Corporation, 21285-AB Datasheet - Page 3

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21285-AB

Manufacturer Part Number
21285-AB
Description
Microprocessor, 21285 Core Logic For SA-110 Microprocessor
Manufacturer
Intel Corporation
Datasheet

Specifications of 21285-AB

Case
BGA
Dc
99+/00+
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Contents
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2
3
21285 Core Logic for SA-110 Datasheet
Introduction.....................................................................................................................1–1
1.1
1.2
Signal Description ..........................................................................................................2–1
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
Transactions...................................................................................................................3–1
3.1
3.2
Features ............................................................................................................1–1
1.1.1
System Applications ..........................................................................................1–2
PCI Signals........................................................................................................2–1
SA-110 Signals..................................................................................................2–3
ROM Signals .....................................................................................................2–5
SDRAM Signals.................................................................................................2–5
Serial Port Signals.............................................................................................2–7
Miscellaneous Signals.......................................................................................2–7
X-Bus/Arbiter Signals ........................................................................................2–8
2.7.1
2.7.2
JTAG Signals ..................................................................................................2–10
Pin State During Reset....................................................................................2–11
Pin Assignment ...............................................................................................2–12
Pins Listed in Numeric Order ..........................................................................2–13
Pins Listed in Alphabetic Order .......................................................................2–17
SA-110 Originated Transactions .......................................................................3–1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
3.1.8
3.1.9
3.1.10 PCI Memory Read ................................................................................3–4
3.1.11 PCI I/O Write ........................................................................................3–4
3.1.12 PCI I/O Read ........................................................................................3–5
3.1.13 PCI Configuration Write........................................................................3–5
3.1.14 PCI Configuration Read .......................................................................3–5
3.1.15 PCI Special Cycle.................................................................................3–5
3.1.16 PCI IACK Read ....................................................................................3–5
3.1.17 X-Bus Write ..........................................................................................3–5
3.1.18 X-Bus Read ..........................................................................................3–6
3.1.19 Outbound Write Flush ..........................................................................3–6
3.1.20 SA-110 Cache Flush ............................................................................3–6
3.1.21 Reserved Addresses ............................................................................3–6
PCI Target Transactions ...................................................................................3–6
Power Management .............................................................................1–2
X-Bus Selection ....................................................................................2–9
PCI Arbiter Selection ..........................................................................2–10
CSR Write ............................................................................................3–1
CSR Read ............................................................................................3–1
SDRAM All-Banks Precharge...............................................................3–2
SDRAM Mode Register Set..................................................................3–3
SDRAM Write .......................................................................................3–3
SDRAM First Read ...............................................................................3–3
3.1.6.1 Lock .........................................................................................3–3
ROM Read ...........................................................................................3–3
ROM Write............................................................................................3–3
PCI Memory Write ................................................................................3–4
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