VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 


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I/O Base 0 Registers –Audio/Modem Scatter/Gather DMA
Read / Write through function 5, R/O through function 6.
I/O Offset 0 – Audio SGD Read Channel Status ......... RWC
7
SGD Active (0 = completed or terminated)........RO
6
SGD Paused ..........................................................RO
........................................ always reads 0
5-4
Reserved
3
SGD Trigger Queued (will restart after EOL) ..RO
2
SGD Stopped (write 1 to resume) ...................RWC
1
SGD EOL
......................................................RWC
0
SGD Flag
......................................................RWC
I/O Offset 1 – Audio SGD Read Channel Control .......... RW
7
SGD Start ............................ WO (always reads 0)
0
No effect
1
Start SGD read channel operation
6
SGD Terminate ...................... WO (always reads 0)
0
No effect
1
Terminate SGD read channel operation
5-4
Reserved
.....always reads 0, writing 1 not allowed
3
SGD Pause
0
Release SGD read channel pause and resume
the transfer from the paused line
1
Pause SGD read channel operation (SGD read
channel pointer stays at the current address)
2-0
Reserved
........................................ always reads 0
I/O Offset 2 – Audio SGD Read Channel Type .............. RW
7
Auto-Start SGD at EOL (1=Enable) ....... default = 0
6
Playback FIFO (1=Enable) ...................... default = 0
5
PCM 16-Bit Format
0
8-Bit Format ...........................................default
1
16-Bit Format
4
PCM Stereo Format
0
Mono Format..........................................default
1
Stereo Format
3-2
Interrupt Select
00 Interrupt at PCI Read of Last Line .........default
01 Interrupt at Last Sample Sent
10 Interrupt at Less Than One Line to Send
11 -reserved-
1
Interrupt on EOL @ End of Block (1=Ena) ... def=0
Interrupt on FLAG @ End-of-Blk (1=Ena) ... def=0
0
I/O Offset 7-4 – Audio SGD R Ch Table Pointer Base ... RW
31-0 SGD Table Pointer Base Address (even addr).....W
Current Pointer Address ........................................R
I/O Offset F-C – Audio SGD R Ch Current Count ......... RO
31-24 Reserved
........................................ always reads 0
23-0 Current SGD Read Channel Count
SGD Table Format
63
62
61
60-56
EOL FLAG STOP
-reserved-
Revision 1.71 June 9, 2000
I/O Offset 10 – Audio SGD Write Channel Status .......... RO
7
6
5-4
3
2
1
0
I/O Offset 11 – Audio SGD Write Channel Control ...... RW
7
6
5-4
3
2-0
I/O Offset 12 – Audio SGD Write Channel Type ........... RW
7
6
5
4
3-2
1
0
I/O Offset 17-14 – Audio SGD W Ch Table Pointer Base RW
31-0 SGD Table Pointer Base Address (even addr) .... W
I/O Offset 1F-1C – Audio SGD W Ch Current Count ... RO
31-24 Reserved
23-0 Current SGD Write Channel Count
EOL
FLAG Block Flag. If set, transfer pauses at the end of this
55-32
31-0
Base
Base
STOP Block Stop. If set, transfer pauses at the end of this
Count
Address
[23:0]
[31:0]
-110-
Function 5 & 6 Registers - AC97 Audio & Modem Codecs
SGD Active (0 = completed or terminated) ....... RO
SGD Paused ......................................................... RO
Reserved
........................................always reads 0
SGD Trigger Queued (will restart after EOL).. RO
SGD Stopped (write 1 to resume)................... RWC
SGD EOL
..................................................... RWC
SGD Flag
..................................................... RWC
SGD Start
............................WO (always reads 0)
0
No effect
1
Start SGD write channel operation
SGD Terminate.......................WO (always reads 0)
0
No effect
1
Terminate SGD write channel operation
.... always reads 0, writing 1 not allowed
Reserved
SGD Pause
0
Release SGD write channel pause and resume
the transfer from the paused line
1
Pause SGD write channel operation (SGD
write channel pointer stays at current address)
Reserved
........................................always reads 0
Auto-Start SGD at EOL (1=Enable)........default = 0
Recording FIFO (1=Enable).....................default = 0
PCM 16-Bit Format
0
8-Bit Format .......................................... default
1
16-Bit Format
PCM Stereo Format
0
Mono Format ......................................... default
1
Stereo Format
........................................always reads 0
Reserved
Interrupt on EOL @ End of Block (1=Ena) ...def=0
Interrupt on FLAG @ End-of-Blk (1=Ena)....def=0
Current Pointer Address ....................................... R
........................................always reads 0
End Of Link. 1 indicates this block is the last of the
link. If the channel “Interrupt on EOL” bit is set, then
an interrupt is generated at the end of the transfer.
block. If the channel “Interrupt on FLAG” bit is set,
then an interrupt is generated at the end of this block.
block. To resume the transfer, write 1 to Rx?0[2].
VT82C686B