VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 
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Page 31/128:

Power Management

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Signal Name
Pin #
THRM / GPI5 / PME#
THRM# / GPO21 / DACK7#
Y11
PWRBTN#
SLPBTN# / IRQ6 / GPI4
RSMRST#
EXTSMI#
Y10
PME# / GPI5 / THRM
SMBALRT# / GPI6
W10
LID / GPI3 / WSC#
U10
RING# / GPI7
V11
U11
BATLOW# / GPI2
CPUSTP# / GPO4
Y12
PCISTP# / GPO5
V12
SUSA# / GPO1 / APICD0
SUSB# / GPO2
SUSC#
SUSST1# / GPO3
V10
SUSCLK / APICD1
Revision 1.71 June 9, 2000

Power Management

I/O
Signal Description
T11
I
Thermal Alarm Monitor Input. (Rx74[1] = 1)
N2
O
Internal Thermal Alarm Output. (F4 Rx57[0] = 1)
I
Power Button. Used by the Power Management subsystem to monitor an
external system on/off button or switch. The VT82C686B performs a 200us
debounce of this input if Function 4 Rx40[5] is set to 1. (3.3V only)
G1
I / I /
Sleep Button. Used by the Power Management subsystem to monitor an
I
external system sleep button or switch. (Function 4 Rx40[6]=1) (10K PU to
VCC if not used)
V6
I
Resume Reset. Resets the internal logic connected to the VCCS power plane
and also resets portions of the internal RTC logic.
IOD
External System Management Interrupt. When enabled to allow it, a
falling edge on this input causes an SMI# to be generated to the CPU to enter
SMI mode. (10K PU to VCCS if not used) (3.3V only)
T11
I
Power Management Event. (Rx74[1]=0) (1K PU to VCCS if not used)
I
SMB Alert (System Management Bus I/O space Rx08[3] = 1). When the
chip is enabled to allow it, assertion generates an IRQ or SMI or power
management event. (10K PU to VCCS if not used)
I
Notebook Computer Display Lid Open / Closed Monitor. Used by the
Power Management subsystem to monitor the opening and closing of the
display lid of notebook computers. Can be used to detect either low-to-high
and/or high-to-low transitions to generate an SMI#.
performs a 200 usec debounce of this input if Function 4 Rx40[5] is set to 1.
(10K PU to VCCS if not used)
I
Ring Indicator. May be connected to external modem circuitry to allow the
system to be re-activated by a received phone call. (10K PU to VCCS if not
used)
I
Battery Low Indicator. (10K PU to VCCS if not used) (3.3V only)
O
CPU Clock Stop (Rx75[4] = 0). Signals the system clock generator to
disable the CPU clock outputs. Not connected if not used. See also PMU I/O
Rx2C[3].
O
PCI Clock Stop (Rx75[5] = 0). Signals the system clock generator to disable
the PCI clock outputs. Not connected if not used.
V9
O
Suspend Plane A Control (Rx74[7]=0 and Function 4 Rx54[2]=0). Asserted
during power management POS, STR, and STD suspend states. Used to
control the primary power plane. (10K PU to VCCS if not used)
W9
O
Suspend Plane B Control (Rx74[7]=0 and Function 4 Rx54[3]=0). Asserted
during power management STR and STD suspend states. Used to control the
secondary power plane. (10K PU to VCCS if not used)
Y9
O
Suspend Plane C Control.
suspend state. Used to control the tertiary power plane. Also connected to
ATX power-on circuitry.
O
Suspend Status 1 (Func4 Rx54[4] = 1 for GPO3). Typically connected to
the North Bridge to provide information on host clock status. Asserted when
the system may stop the host clock, such as Stop Clock or during POS, STR,
or STD suspend states. Connect 10K PU to VCCS.
T10
O
Suspend Clock. 32.768 KHz output clock for use by the North Bridge (e.g.,
Apollo MVP3 or MVP4) for DRAM refresh purposes.
Suspend-to-Disk and Soft-Off modes. Connect 10K PU to VCCS.
-25-
VT82C686B
The VT82C686B
Asserted during power management STD
Stopped during
Pinouts