VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 


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Page 34/128:

Legacy I/O Registers

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Table 3. Registers

Legacy I/O Registers

Port Master DMA Controller Registers
00
Channel 0 Base & Current Address
01
Channel 0 Base & Current Count
02
Channel 1 Base & Current Address
03
Channel 1 Base & Current Count
04
Channel 2 Base & Current Address
05
Channel 2 Base & Current Count
06
Channel 3 Base & Current Address
07
Channel 3 Base & Current Count
08
Status / Command
09
Write Request
0A
Write Single Mask
0B
Write Mode
0C
Clear Byte Pointer FF
0D
Master Clear
0E
Clear Mask
0F
Read / Write Mask
Port Master Interrupt Controller Regs
20
Master Interrupt Control
21
Master Interrupt Mask
20
Master Interrupt Control Shadow
21
Master Interrupt Mask Shadow
* RW if shadow registers are disabled
Port Timer/Counter Registers
40
Timer / Counter 0 Count
41
Timer / Counter 1 Count
42
Timer / Counter 2 Count
43
Timer / Counter Control
Port Keyboard Controller Registers
60
Keyboard Controller Data
61
Misc Functions & Speaker Control
64
Keyboard Ctrlr Command / Status
Port CMOS / RTC / NMI Registers
70
CMOS Memory Address & NMI Disa
71
CMOS Memory Data (128 bytes)
72
CMOS Memory Address
73
CMOS Memory Data (256 bytes)
74
CMOS Memory Address
75
CMOS Memory Data (256 bytes)
NMI Disable is port 70h (CMOS Memory Address) bit-7.
RTC control occurs via specific CMOS data locations (0-Dh).
Ports 72-73 may be used to access all 256 locations of CMOS.
Ports 74-75 may be used to access CMOS if the internal RTC
is disabled.
Revision 1.71 June 9, 2000
Legacy I/O Registers (continued)
Default Acc
Port DMA Page Registers
RW
87
DMA Page – DMA Channel 0
RW
83
DMA Page – DMA Channel 1
RW
81
DMA Page – DMA Channel 2
RW
82
DMA Page – DMA Channel 3
RW
8F
DMA Page – DMA Channel 4
RW
8B
DMA Page – DMA Channel 5
RW
89
DMA Page – DMA Channel 6
RW
8A
DMA Page – DMA Channel 7
RW
WO
Port System Control Registers
92
System Control
WO
WO
WO
Port Slave Interrupt Controller Regs
WO
A0
Slave Interrupt Control
A1
Slave Interrupt Mask
WO
RW
A0
Slave Interrupt Control Shadow
A1
Slave Interrupt Mask Shadow
* RW accessible if shadow registers are disabled
Default Acc
*
Port Slave DMA Controller Registers
*
C0
Channel 0 Base & Current Address
RW
C2
Channel 0 Base & Current Count
RW
C4
Channel 1 Base & Current Address
C6
Channel 1 Base & Current Count
C8
Channel 2 Base & Current Address
Default Acc
CA
Channel 2 Base & Current Count
RW
RW
CC
Channel 3 Base & Current Address
CE
Channel 3 Base & Current Count
RW
D0
Status / Command
WO
D2
Write Request
D4
Write Single Mask
Default Acc
RW
D6
Write Mode
RW
D8
Clear Byte Pointer FF
RW
DA
Master Clear
DC
Clear Mask
Default Acc
DE
Read / Write Mask
WO
RW
RW
RW
RW
RW
-28-
VT82C686B
Default Acc
RW
RW
RW
RW
RW
RW
RW
RW
Default Acc
RW
Default Acc
*
*
RW
RW
Default Acc
RW
RW
RW
RW
RW
RW
RW
RW
RW
WO
WO
WO
WO
WO
WO
RW
Register Overview