AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 123

• Manufacturer Part Number: AT86RF232
• Manufacturer: Atmel Corporation

Specifications of AT86RF232

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -100
• Receive Current Consumption (ma): 11.8
• Transmit Current Consumption (ma): 13.8
• Link Budget (dbm): 103

10.1 Frame Receive Procedure
10 Radio Transceiver Usage
8321A–MCU Wireless–10/11
This section describes basic procedures to receive and transmit frames using the
Atmel AT86RF232. For a detailed programming description refer to reference [6].
A frame reception comprises of two actions: The PHY listens for, receives and
demodulates the frame to the Frame Buffer and signalizes the reception to the
microcontroller. After or while that the microcontroller read the available frame data
from the Frame Buffer via the SPI interface.
While in state RX_ON or RX_AACK_ON the radio transceiver searches for incoming
frames on the selected channel. Assuming the appropriate interrupts are enabled, a
detection
IRQ_2 (RX_START) first. The frame reception is completed when issuing interrupt
IRQ_3 (TRX_END).
Different Frame Buffer read access scenarios are recommended for:
 Non-time critical applications
 Time-critical applications
Waiting for IRQ_3 (TRX_END) interrupt before starting a Frame Buffer read access is
recommended for operations considered to be none time critical.
the frame receive procedure using IRQ_3 (TRX_END).
Figure 10-1. Transactions between AT86RF232 and Microcontroller during Receive.
Critical protocol timing could require starting the Frame Buffer read access after
interrupt IRQ_2 (RX_START). The first byte of the frame data can be read 32µs after
the IRQ_2 (RX_START) interrupt. The microcontroller must ensure to read slower than
the frame is received. Otherwise a Frame Buffer under run occurs, IRQ_6 (TRX_UR) is
issued, and the frame data may be not valid. To avoid this, the Frame Buffer read
access can be controlled by using a Frame Buffer Empty indicator, refer to
Section
11.5.
of
an
Read IRQ status, pin 24 (IRQ) deasserted
Read IRQ status, pin 24 (IRQ) deasserted
Read frame data (Frame Buffer access)
IEEE 802.15.4
IRQ issued (IRQ_2)
IRQ issued (IRQ_3)
compliant
read access starts after IRQ_3 (TRX_END)
read access starts after IRQ_2 (RX_START)
frame
is
indicated
AT86RF232
Figure 10-1
by
illustrates
interrupt
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