AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 138
AT89LP3240
Manufacturer Part Number
AT89LP3240
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT89LP3240.pdf
(200 pages)
Specifications of AT89LP3240
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
38
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
4.25
Eeprom (bytes)
8192
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 3.6
Timers
3
Isp
SPI/OCD
Watchdog
Yes
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138
Noise Considerations
AT89LP3240/6440
be set by hardware while the conversion is in progress. Note that the timer overflow rate must be
slower than the conversion time.
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of
analog measurements. If conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
Figure 20-7. Example ADC Power Connections (TQFP Package)
• Connect a decoupling capacitor between the V
• Keep analog signal paths as short as possible. Make sure to run analog signals tracks over
• Place the CPU in Idle during a conversion.
• If any Port 0 pins are used as digital outputs, it is essential that these do not switch while a
capacitor should be located as close to the package as possible.
an analog ground plane, and keep them well away from high-speed digital tracks.
conversion is in progress.
39
38
37
36
35
DD
34
pin and GND as shown in
33
32
31
30
29
28
Analog Ground
P0.4 (ADC4)
P0.5 (ADC5)
P0.6 (ADC6)
P0.7 (ADC7)
GND
Plane
Figure
3706C–MICRO–2/11
20-7. This
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