AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 336

• Manufacturer Part Number: AT90CAN64
• Manufacturer: Atmel Corporation

Specifications of AT90CAN64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25. Memory Programming
25.1
336
Program and Data Memory Lock Bits
AT90CAN32/64/128
The AT90CAN32/64/128 provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in
erased to “1” with the Chip Erase command.
Table 25-1.
Note:
Table 25-2.
BLB0 Mode
BLB1 Mode
LB Mode
Lock Bit Byte
1
2
3
1
2
3
4
1
Memory Lock Bits
1. “1” means unprogrammed, “0” means programmed.
BLB12
BLB02
BLB01
BLB11
LB2
LB1
Lock Bit Byte
Lock Bit Protection Modes
BLB02
BLB12
LB2
1
1
0
1
1
0
0
1
BLB01
BLB11
LB1
1
0
0
1
0
0
1
1
(1)
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in Parallel and
Serial Programming mode. The Fuse bits are locked in both Serial and
Parallel Programming mode.
Further programming and verification of the Flash and EEPROM is disabled
in Parallel and Serial Programming mode. The Boot Lock bits and Fuse bits
are locked in both Serial and Parallel Programming mode.
No restrictions for SPM (Store Program Memory) or LPM (Load Program
Memory) accessing the Application section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM executing
from the Boot Loader section is not allowed to read from the Application
section. If Interrupt Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not allowed to read from the
Application section. If Interrupt Vectors are placed in the Boot Loader
section, interrupts are disabled while executing from the Application section.
No restrictions for SPM or LPM accessing the Boot Loader section.
(1)(2)
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
(1)
Table
25-2. The Lock bits can only be
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
(1)
7679H–CAN–08/08