ATmega3290A Atmel Corporation, ATmega3290A Datasheet - Page 251

• Manufacturer Part Number: ATmega3290A
• Manufacturer: Atmel Corporation

Specifications of ATmega3290A

• Flash (kbytes): 32 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8284D–AVR–6/11
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
Table 24-4.
• Bit 3 – Reserved
This bit is reserved and will always read as zero.
• Bits 2:0 – LCDCD[2:0]: LCD Clock Divide 2, 1, and 0
The LCDCD[2:0] bits determine division ratio in the clock divider. The various selections are
shown in
selection.
Table 24-5.
The frame frequency can be calculated by the following equation:
Where:
This is a very flexible scheme, and users are encouraged to calculate their own table to investi-
gate the possible frame rates from the formula above. Note when using 1/3 duty the frame rate
LCDCD2
LCDPS2
1
1
1
0
0
0
0
1
1
1
1
N = prescaler divider (16, 64, 128, 256, 512, 1024, 2048, or 4096).
K = 8 for duty = 1/4, 1/2, and static.
K = 6 for duty = 1/3.
D = Division factor (see
Table 24-5 on page
LCDCD1
LCDPS1
LCD Prescaler Select (Continued)
LCD Clock Divide
0
1
1
0
0
1
1
0
0
1
1
LCDCD0
LCDPS0
1
0
1
0
1
0
1
0
1
0
1
Table 24-5 on page
251. This Clock Divider gives extra flexibility in frame rate
divided by (D):
Output from
clk
clk
clk
f
Output from
Prescaler
frame
clk
Prescaler
LCD
LCD
LCD
LCD
/1024
/2048
/4096
1
2
3
4
5
6
7
8
=
/N
------------------------- -
(
K N D
251)
f
clk
⋅
LCD
Applied Prescaled LCD Clock Frequency
⋅
clk
when LCDCD2:0 = 0, Duty = 1/4, and
)
LCD
1/4, gives a frame rate of:
= 32.768kHz, N = 16, and Duty =
Frame Rate = 64Hz
520kHz
1MHz
2MHz
85.3Hz
51.2Hz
42.7Hz
36.6Hz
256Hz
128Hz
64Hz
32Hz
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