ATmega48 Atmel Corporation, ATmega48 Datasheet - Page 283

• Manufacturer Part Number: ATmega48
• Manufacturer: Atmel Corporation

Specifications of ATmega48

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

27.9
27.9.1
2545T–AVR–05/11
Register description
SPMCSR – Store program memory control and status register
Table 27-11. Explanation of different variables used in
Note:
The Store Program Memory Control and Status Register contains the control bits needed to con-
trol the Boot Loader operations.
• Bit 7 – SPMIE: SPM interrupt enable
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM
ready interrupt will be enabled. The SPM ready Interrupt will be executed as long as the SELF-
PRGEN bit in the SPMCSR Register is cleared.
• Bit 6 – RWWSB: Read-while-write section busy
When a Self-Programming (Page Erase or Page Write) operation to the RWW section is initi-
ated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, the RWW section
cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bit is written to one after a
Self-Programming operation is completed. Alternatively the RWWSB bit will automatically be
cleared if a page load operation is initiated.
Bit
0x37 (0x57)
Read/write
Initial value
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
1. Z15:Z14: Always ignored.
Z0: Should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
ping to the Z-pointer, Atmel ATmega168.
SPMIE
“Addressing the flash during self-programming” on page 274
R/W
7
0
PC[12:6]
PC[5:0]
12
5
RWWSB
R
6
0
Corresponding
Z-value
Z13:Z7
5
R
0
–
Z6:Z1
Z13
Z6
(1)
RWWSRE
R/W
4
0
Description
Most significant bit in the Program Counter. (The
program counter is 12 bits PC[11:0])
Most significant bit which is used to address the
words within one page (64 words in a page requires
6 bits PC [5:0])
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1
Program counter page address: Page select, for
page erase and page write
Program counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)
BLBSET
R/W
3
0
Figure 27-3 on page 275
PGWRT
R/W
2
0
ATmega48/88/168
PGERS
R/W
1
0
for details about the use of
SELFPRGEN
R/W
0
0
and the map-
SPMCSR
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