ATtiny24

Manufacturer Part NumberATtiny24
ManufacturerAtmel Corporation
ATtiny24 datasheets
 


Specifications of ATtiny24

Flash (kbytes)2 KbytesPin Count14
Max. Operating Frequency20 MHzCpu8-bit AVR
# Of Touch Channels4Hardware Qtouch AcquisitionNo
Max I/o Pins12Ext Interrupts12
Usb SpeedNoUsb InterfaceNo
Spi1Twi (i2c)1
Graphic LcdNoVideo DecoderNo
Camera InterfaceNoAdc Channels8
Adc Resolution (bits)10Adc Speed (ksps)15
Analog Comparators1Resistive Touch ScreenNo
Temp. SensorYesCrypto EngineNo
Sram (kbytes)0.12Eeprom (bytes)128
Self Program MemoryYESDram MemoryNo
Nand InterfaceNoPicopowerNo
Temp. Range (deg C)-40 to 85I/o Supply Class1.8 to 5.5
Operating Voltage (vcc)1.8 to 5.5FpuNo
Mpu / Mmuno / noTimers2
Output Compare Channels4Input Capture Channels1
Pwm Channels432khz RtcNo
Calibrated Rc OscillatorYes  
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Features
High Performance, Low Power AVR
Advanced RISC Architecture
– 120 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
Non-Volatile Program and Data Memories
– 2/4/8K Bytes of In-System Programmable Program Memory Flash
• Endurance: 10,000 Write/Erase Cycles
– 128/256/512 Bytes of In-System Programmable EEPROM
• Endurance: 100,000 Write/Erase Cycles
– 128/256/512 Bytes of Internal SRAM
– Data Retention: 20 years at 85°C / 100 years at 25°C
– Programming Lock for Self-Programming Flash & EEPROM Data Security
Peripheral Features
– One 8-Bit and One 16-Bit Timer/Counter with Two PWM Channels, Each
– 10-bit ADC
• 8 Single-Ended Channels
• 12 Differential ADC Channel Pairs with Programmable Gain (1x / 20x)
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Universal Serial Interface
Special Microcontroller Features
– debugWIRE On-chip Debug System
– In-System Programmable via SPI Port
– Internal and External Interrupt Sources: Pin Change Interrupt on 12 Pins
– Low Power Idle, ADC Noise Reduction, Standby and Power-Down Modes
– Enhanced Power-on Reset Circuit
– Programmable Brown-out Detection Circuit
– Internal Calibrated Oscillator
– On-chip Temperature Sensor
I/O and Packages
– Available in 20-Pin QFN/MLF & 14-Pin SOIC and PDIP
– Twelve Programmable I/O Lines
Operating Voltage:
– 1.8 – 5.5V for ATtiny24V/44V/84V
– 2.7 – 5.5V for ATtiny24/44/84
Speed Grade
– ATtiny24V/44V/84V
• 0 – 4 MHz @ 1.8 – 5.5V
• 0 – 10 MHz @ 2.7 – 5.5V
– ATtiny24/44/84
• 0 – 10 MHz @ 2.7 – 5.5V
• 0 – 20 MHz @ 4.5 – 5.5V
Industrial Temperature Range: -40°C to +85°C
Low Power Consumption
– Active Mode (1 MHz System Clock): 300 µA @ 1.8V
– Power-Down Mode: 0.1 µA @ 1.8V
®
8-Bit Microcontroller
8-bit
Microcontroller
with 2/4/8K
Bytes In-System
Programmable
Flash
ATtiny24
ATtiny44
ATtiny84
Summary
Rev. 8006KS–AVR–10/10

ATtiny24 Summary of contents

  • Page 1

    ... On-chip Temperature Sensor • I/O and Packages – Available in 20-Pin QFN/MLF & 14-Pin SOIC and PDIP – Twelve Programmable I/O Lines • Operating Voltage: – 1.8 – 5.5V for ATtiny24V/44V/84V – 2.7 – 5.5V for ATtiny24/44/84 • Speed Grade – ATtiny24V/44V/84V • 0 – 4 MHz @ 1.8 – 5.5V • 0 – 10 MHz @ 2.7 – 5.5V – ...

  • Page 2

    ... Pin Configurations Figure 1-1. Pinout ATtiny24/44/84 (PCINT8/XTAL1/CLKI) PB0 (PCINT9/XTAL2) PB1 (PCINT11/RESET/dW) PB3 (PCINT10/INT0/OC0A/CKOUT) PB2 (PCINT7/ICP/OC0B/ADC7) PA7 (PCINT6/OC1A/SDA/MOSI/DI/ADC6) PA6 (ADC4/USCK/SCL/T1/PCINT4) PA4 (ADC3/T0/PCINT3) PA3 (ADC2/AIN1/PCINT2) PA2 (ADC1/AIN0/PCINT1) PA1 (ADC0/AREF/PCINT0) PA0 NOTE Bottom pad should be soldered to ground. DNC: Do Not Connect 1.1 Pin Descriptions 1 ...

  • Page 3

    ... Port B also serves the functions of various special features of the ATtiny24/44/84 as listed in Section 10.2 “Alternate Port Functions” on page 1.1.4 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running and provided the reset pin has not been disabled. The min- imum pulse length is given in generate a reset ...

  • Page 4

    ... Overview ATtiny24/44/ low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny24/44/84 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. Figure 2-1. VCC GND The AVR core combines a rich instruction set with 32 general purpose working registers ...

  • Page 5

    ... ISP Flash allows the Program memory to be re-programmed in-system through an SPI serial interface conventional non-volatile memory programmer on-chip boot code running on the AVR core. The ATtiny24/44/84 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators and Evaluation kits. 8006KS–AVR–10/10 ...

  • Page 6

    ... Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 3.4 Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. ATtiny24/44/84 6 8006KS–AVR–10/10 ...

  • Page 7

    ... ADIF ADIE ADC Data Register High Byte ADC Data Register Low Byte ACME – ADLAR – – ADC6D ADC5D ADC4D ADC3D – – – PRTIM1 ATtiny24/44/84 Bit 2 Bit 1 Bit – SP9 SP8 SP2 SP1 SP0 – – – – ...

  • Page 8

    ... Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. ATtiny24/44/84 8 8006KS–AVR–10/10 ...

  • Page 9

    ... PC ← then PC ← then PC ← then PC ← then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← Rd(n+1), Rd(7) ← 0 Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7) ATtiny24/44/84 Operation Flags #Clocks Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H ...

  • Page 10

    ... Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break ATtiny24/44/84 10 Description Rd(7)←C,Rd(n)← Rd(n+1),C←Rd(0) Rd(n) ← Rd(n+1), n=0..6 Rd(3..0)←Rd(7..4),Rd(7..4)←Rd(3..0) SREG(s) ← 1 SREG(s) ← ← Rr(b) Rd(b) ← ← ← ← ← ...

  • Page 11

    ... Ordering Code Package ATtiny24V-10SSU 14S1 ATtiny24V-10SSUR 14S1 ATtiny24V-10PU 14P3 ATtiny24V-10MU 20M1 ATtiny24V-10MUR 20M1 ATtiny24-20SSU 14S1 ATtiny24-20SSUR 14S1 ATtiny24-20PU 14P3 ATtiny24-20MU 20M1 ATtiny24-20MUR 20M1 Package Type ATtiny24/44/84 (2) Operational Range Industrial (3) (-40°C to +85°C) Industrial (3) (-40°C to +85°C) 11 ...

  • Page 12

    ... Wide Body, Plastic Gull Wing Small Outline Package (SOIC) 14P3 14-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 20M1 20-pad 0.8 mm Body, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATtiny24/44/84 12 (1) Ordering Code Package ATtiny44V-10SSU 14S1 ...

  • Page 13

    ... Ordering Code Package ATtiny84V-10SSU 14S1 ATtiny84V-10SSUR 14S1 ATtiny84V-10PU 14P3 ATtiny84V-10MU 20M1 ATtiny84V-10MUR 20M1 ATtiny84-20SSU 14S1 ATtiny84-20SSUR 14S1 ATtiny84-20PU 14P3 ATtiny84-20MU 20M1 ATtiny84-20MUR 20M1 Package Type ATtiny24/44/84 (2) Operational Range Industrial (3) (-40°C to +85°C) Industrial (3) (-40°C to +85°C) 13 ...

  • Page 14

    ... D2 Pin #1 Notch (0. BOTTOM VIEW Reference JEDEC Standard MO-220, Fig. 1 (SAW Singulation) WGGD-5. Note: 2325 Orchard Parkway San Jose, CA 95131 R ATtiny24/44/ TITLE 20M1, 20-pad 0.8 mm Body, Lead Pitch 0.50 mm, 2.6 mm Exposed Pad, Micro Lead Frame Package (MLF) ...

  • Page 15

    ... Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 8006KS–AVR–10/10 D PIN TITLE 14P3, 14-lead (0.300"/7.62 mm Wide) Plastic Dual Inline Package (PDIP) ATtiny24/44/ COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM A – – A1 0.381 – D 18.669 – ...

  • Page 16

    ... L is the length of the terminal for soldering to a substrate. 5. The lead width B, as measured 0.36 mm (0.014") or greater above the seating plane, shall not exceed a maximum value of 0.61 mm (0.024") per side. 2325 Orchard Parkway San Jose, CA 95131 R ATtiny24/44/ ...

  • Page 17

    ... Errata The revision letters in this section refer to the revision of the corresponding ATtiny24/44/84 device. 8.1 ATtiny24 8.1.1 Rev. D – known errata. 8.1.2 Rev. C • Reading EEPROM when system clock frequency is below 900 kHz may not work 1. Reading EEPROM when system clock frequency is below 900 kHz may not work Reading data from the EEPROM at system clock frequency below 900 kHz may result in wrong data read ...

  • Page 18

    ... Reading EEPROM when system clock frequency is below 900 kHz may not work Reading data from the EEPROM at system clock frequency below 900 kHz may result in wrong data read. Problem Fix/Work around Avoid using the EEPROM at clock frequency below 900 kHz. ATtiny24/44/84 18 8006KS–AVR–10/10 ...

  • Page 19

    ... ATtiny84 8.3.1 Rev. A – known errata. 8006KS–AVR–10/10 ATtiny24/44/84 19 ...

  • Page 20

    ... Added Table: – 8. Updated Figure: – 9. Updated old and Hysteresis”. 10. Changed ATtiny24/44 device status to “Not Recommended for New Designs. Use: ATtiny24A/44A”. ATtiny24/44/84 20 Section 24. “Ordering Information” on page Section 6.4 “Clock Output Buffer” on page Table 19-16, “High-voltage Serial Programming Instruction Set for 171. Table 6-8, “ ...

  • Page 21

    ... Characteristics” on page 176 “Accuracy of Calibrated Internal RC Oscillator” on page 176 “System and Reset Characteristics” on page 177 “Supply Current of I/O Modules” on page 185 “ATtiny24” on page 223 “ATtiny44” on page 224 “ATtiny84” on page 225 “MCUCR – MCU Control Register” on page 36 “ ...

  • Page 22

    ... CC (Reset Pin Used as I/O)” on page 203 CC ” on page 205 CC ” on page 206 CC ” on page 207 CC (ATtiny24)” on page 209 CC (ATtiny44)” on page 209 CC (ATtiny84)” on page 210 CC = 3V)” on page 198 CC = 5V)” on page 198 CC = 3V)” on page 199 CC = 5V)” ...

  • Page 23

    ... Table 11-5 on page 82, Table 11-8 on page 83, Table 20-11 on page Updated table references in “TCCR0A – Timer/Counter Control Register A” on page Updated Port B, Bit 0 functions in Updated WDTCR bit name to WDTCSR in assembly code examples. ATtiny24/44/84 = -40°C to +85°C” -40°C to +85° 1.8 - 5.5V (Unless 25° (Unless ...

  • Page 24

    ... Updated Features in 5. Updated Operation in 6. Updated ATtiny24/44/84 24 “TIFR1 – Timer/Counter Interrupt Flag Register 1” on page “TIFR1 – Timer/Counter Interrupt Flag Register 1” on page “SPI Master Operation Example” on page “Enter High-voltage Serial Programming Mode” on page “Electrical Characteristics” on page “ ...

  • Page 25

    ... Rev A. 12/05 Initial revision. 8006KS–AVR–10/10 Updated DC Characteristics in “Electrical Characteristics” on page Updated “Typical Characteristics” on page Updated “Errata” on page 223. ATtiny24/44/84 174. 185. 25 ...

  • Page 26

    ... Atmel Corporation. All rights reserved. ® Atmel , logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia Limited Atmel Munich GmbH Unit 01-5 & ...