ATxmega128D4 Atmel Corporation, ATxmega128D4 Datasheet - Page 230

• Manufacturer Part Number: ATxmega128D4
• Manufacturer: Atmel Corporation

Specifications of ATxmega128D4

• Flash (kbytes): 128 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Speed: No
• Usb Interface: No
• Spi: 4
• Twi (i2c): 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 14
• Input Capture Channels: 14
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8210B–AVR–04/10
be represented both left- or right adjusted. Left adjusted means that the 8 MSB are found in the
high byte.
When the ADC is in signed mode, the MSB represents the sign bit. In 12-bit right adjusted mode,
the sign bit (bit 11) is padded to bits 12-15 to create a signed 16-bit number directly. In 8-bit
mode, the sign bit (bit 7) is padded to the entire high byte.
Figure 20-9 on page 230
nal input range and the result representation with 12-bit right adjusted mode.
Figure 20-9. Signed differential input (with gain), input range, and result representation
Figure 20-10. Signed single ended and internal input, input range, and result representation
Figure 20-11. Unsigned single ended and internal input, input range, and result representation
VREF
VREF
-VREF
-VREF
GAIN
VREF
GAIN
0 V
0 V
GND
−
Δ
V
to
Figure 20-11 on page 230
VINN
VINN = GND
=
VREF
2
VINP
VINN
RES
VINP
VINP
−
Δ
V
-2045
-2046
-2047
-2048
-2045
-2046
-2047
-2048
2047
2046
2045
2047
2046
2045
4095
4094
4093
Dec
Dec
Dec
203
202
201
200
-1
-2
...
-1
-2
...
...
...
3
2
1
0
3
2
1
0
...
...
0
7FD
FFE
Hex
7FE
7FD
FFF
FFE
Hex
7FF
7FE
FFF
7FF
803
802
801
800
shows the different input options, the sig-
803
802
801
800
FFD
0CB
0CA
Hex
FFF
FFE
0C9
0C8
...
...
...
...
3
2
1
0
3
2
1
0
...
0
0111 1111 1111
0111 1111 1110
0111 1111 1101
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
1111 1111 1111
1111 1111 1110
1000 0000 0011
1000 0000 0010
1000 0000 0001
1000 0000 0000
0111 1111 1111
0111 1111 1110
0111 1111 1101
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
1111 1111 1111
1111 1111 1110
1000 0000 0011
1000 0000 0010
1000 0000 0001
1000 0000 0000
1111 1111 1111
1111 1111 1110
1111 1111 1101
0000 1100 1011
0000 1100 1010
0000 1100 1001
0000 1100 1000
0000 0000 0000
Binary
Binary
Binary
...
...
...
...
...
0000 0111 1111 1111
0000 0111 1111 1110
0000 0111 1111 1101
0000 0000 0000 0011
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1111 1000 0000 0011
1111 1000 0000 0010
1111 1000 0000 0001
1111 1000 0000 0000
16-bit result register
0000 0111 1111 1111
0000 0111 1111 1110
0000 0111 1111 1101
0000 0000 0000 0011
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1111 1000 0000 0011
1111 1000 0000 0010
1111 1000 0000 0001
1111 1000 0000 0000
16-bit result register
0000 1111 1111 1111
0000 1111 1111 1110
0000 1111 1111 1101
0000 0000 1100 1011
0000 0000 1100 1010
0000 0000 1100 1001
0000 0000 1100 1000
0000 0000 0000 0000
16-bit result register
XMEGA D
...
...
...
...
...
230