ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 408

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ATxmega192A3U

Manufacturer Part Number
ATxmega192A3U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega192A3U

Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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31.5.2
31.6
8331A–AVR–07/11
Data Registers
Scanning the PDI Pins
Two observe-only cells are inserted to make the combined RESET and PDI_CLK pin and the
PDI_DATA pin observable. Even though the PDI_DATA pin is bidirectional, it is only made
observable in order to avoid any extra logic on the PDI_DATA output path.
Figure 31-3. An observe-only input cell.
The supported data registers that can be connected between TDI and TDO are:
Figure 31-4. JTAG data register overview.
• Bypass register (Ref: register A in
• Device identification register (Ref: register C in
• Boundary scan chain (Ref: register D in
• PDICOM data register (Ref: register B in
From system
pin
D
D
D
D
D
D
D
D
D
I/O PORTS
D
PDI
D
JTAG
Figure 31-4 on page
0
1
Figure 31-4 on page
Figure 31-4 on page
A
B
C
Internal registers
B
C
Figure 31-4 on page
C
Atmel AVR XMEGA AU
B
CTRL
TAP
C
D Q
408).
To next cell
408).
408)
to all TCK
registers
408).
To system
logic
TMS
TCK
TDO
TDI
408

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