ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 134

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ATxmega64A4U

Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A4U

Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Part Number
Manufacturer
Quantity
Price
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ATxmega64A4U-AU
Manufacturer:
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Part Number:
ATxmega64A4U-U
Manufacturer:
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Quantity:
74
Atmel AVR XMEGA AU
If an interrupt occurs during execution of a multicycle instruction, this instruction is completed
before the interrupt is served. See
Figure 12-1 on page 134
for more details.
Figure 12-1. Interrupt execution of a multicycle instruction.
If an interrupt occurs when the device is in sleep mode, the interrupt execution response time is
increased by five clock cycles. In addition, the response time is increased by the start-up time
from the selected sleep mode.
A return from an interrupt handling routine takes four to five clock cycles, depending on the size
of the program counter. During these clock cycles, the program counter is popped from the stack
and the stack pointer is incremented.
134
8331A–AVR–07/11

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