AD7910 Analog Devices, AD7910 Datasheet - Page 14

• Manufacturer Part Number: AD7910
• Description: 250 kSPS, 10-Bit ADC in 6 Lead SC70
• Manufacturer: Analog Devices

Specifications of AD7910

• Resolution (bits): 10bit
• # Chan: 1
• Sample Rate: 250kSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni Vdd
• Adc Architecture: SAR
• Pkg Type: SC70,SOP

AD7910/AD7920
CONVERTER OPERATION
The AD7910/AD7920 are successive approximation analog-to-
digital converters based around a charge redistribution DAC.
Figure 14 and Figure 15 show simplified schematics of the
ADC. Figure 14 shows the ADC during its acquisition phase.
When SW2 is closed and SW1 is in Position A, the comparator
is held in a balanced condition, and the sampling capacitor
acquires the signal on V
When the ADC starts a conversion (see Figure 15), SW2 opens
and SW1 moves to Position B, causing the comparator to become
unbalanced. The control logic and charge redistribution DAC are
used to add and subtract fixed amounts of charge from the
sampling capacitor to bring the comparator back into a balanced
condition. When the comparator is rebalanced, the conversion is
complete. The control logic generates the ADC output code.
Figure 16 shows the ADC transfer function.
ADC TRANSFER FUNCTION
The output coding of the AD7910/AD7920 is straight binary.
The designed code transitions occur at the successive integer
LSB values, that is, 1 LSB, 2 LSBs, and so on. The LSB size is
V
ideal transfer characteristic for the AD7910/AD7920 is shown
in Figure 16.
V
V
IN
IN
DD
/4096 for the AD7920 and V
A
A
SW1
SW1
AGND
AGND
B
B
CAPACITOR
CAPACITOR
SAMPLING
SAMPLING
CONVERSION
ACQUISITION
PHASE
PHASE
V
V
DD
Figure 14. ADC Acquisition Phase
DD
Figure 15. ADC Conversion Phase
/2
/2
IN
.
SW2
SW2
DD
/1024 for the AD7910. The
COMPARATOR
COMPARATOR
REDISTRIBUTION
REDISTRIBUTION
CHARGE
CHARGE
CONTROL
CONTROL
DAC
LOGIC
DAC
LOGIC
Rev. C | Page 14 of 24
TYPICAL CONNECTION DIAGRAM
Figure 17 shows a typical connection diagram for the AD7910/
AD7920. V
should be well decoupled. This provides an analog input range of
0 V to V
four leading zeros followed by the MSB of the 12-bit or 10-bit
result. Two trailing zeros follow the 10-bit result from the
AD7910.
Alternatively, because the supply current required by the
AD7910/AD7920 is so low, a precision reference can be used as
the supply source to the AD7910/AD7920. An REF19x voltage
reference (REF195 for 5 V or REF193 for 3 V) can be used to
supply the required voltage to the ADC (see Figure 17). This
configuration is especially useful if the power supply is quite
noisy or if the system supply voltages are at a value other than
5 V or 3 V (for example, 15 V). The REF19x outputs a steady
voltage to the AD7910/AD7920. If the low dropout REF193 is
used, the current it needs to supply to the AD7910/AD7920 is
typically 1.2 mA. When the ADC is converting at a rate of
250 kSPS, the REF193 needs to supply a maximum of 1.4 mA to
the AD7910/AD7920. The load regulation of the REF193 is
typically 10 ppm/mA (REF193, V
error of 14 ppm (42 μV) for the 1.4 mA drawn from it. This
corresponds to a 0.057 LSB error for the AD7920 with V
3 V from the REF193 and a 0.014 LSB error for the AD7910.
For applications where power consumption is of concern, the
power-down mode of the ADC and the sleep mode of the
REF19x reference should be used to improve power
performance. See the Modes of Operation section.
DD
. The conversion result is output in a 16-bit word with
111...111
111...110
111...000
011...111
000...010
000...001
000...000
REF
is taken internally from V
0V
Figure 16. Transfer Characteristic
1LSB
ANALOG INPUT
S
1LSB = V
1LSB = V
= 5 V), which results in an
DD
+V
DD
DD
DD
and, as such, V
/1024 (AD7910)
/4096 (AD7920)
– 1LSB
DD
DD
=