AD7707 Analog Devices, AD7707 Datasheet - Page 6

• Manufacturer Part Number: AD7707
• Manufacturer: Analog Devices

Specifications of AD7707

• Resolution (bits): 16bit
• # Chan: 3
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Bip
• Ain Range: Bip (Vref)/(PGA Gain),Bip 10V,Bip 5.0V,Uni (Vref)/(PGA Gain),Uni 10V,Uni 5.0V
• Adc Architecture: Sigma-Delta
• Pkg Type: SOIC,SOP

AD7707
Parameter
LOGIC OUTPUTS (Including MCLK OUT)
SYSTEM CALIBRATION
POWER REQUIREMENTS
POWER REQUIREMENTS (Continued)
MCLK IN Only
MCLK IN Only
V
V
Floating State Leakage Current
Floating State Output Capacitance
Data Output Coding
Low Level Input Channels (AIN1 and AIN2)
High Level Input Channels (AIN3)
Power Supply Voltages
Power Supply Currents
DV
Power Supply Rejection
OL
OH
V
V
V
V
Positive Full-Scale Calibration Limit
Negative Full-Scale Calibration Limit
Offset Calibration Limit
Input Span
Positive Full-Scale Calibration Limit
Negative Full-Scale Calibration Limit
Offset Calibration Limit
Input Span
AV
DV
AV
, Output Low Voltage
DD
, Output High Voltage
INL
INH
INL
INH
DD
DD
Current
DD
, Input Low Voltage
, Input Low Voltage
, Input High Voltage
, Input High Voltage
Voltage
Voltage
Current
17
16
16
18, 19
16
16
14
15
15
15
15
B Version
0.8
3.5
0.4
2.5
0.4
0.4
4
DV
±10
9
Binary
Offset binary
(1.05 ×
V
−(1.05 ×
V
−(1.05 ×
V
(0.8 × V
(2.1 × V
(8.4 × V
−(8.4 ×
V
−(8.4 ×
V
(6.4 × V
(16.8 ×
V
2.7 to 3.3 or
4.75 to 5.25
2.7 to 5.25
0.27
0.6
0.5
1.1
0.080
0.15
0.18
0.35
REF
REF
REF
REF
REF
REF
DD
)/gain
)/gain
)/gain
)/gain
)/gain
)/gain
− 0.6
REF
REF
REF
REF
)/gain
)/gain
)/gain
)/gain
1
Rev. B | Page 6 of 52
Unit
V max
V min
V max
V min
V max
V max
V min
V min
μA max
pF typ
V max
V max
V max
V min
V max
V max
V max
V max
V min
V max
V min to V max
V min to V max
mA max
mA max
mA max
mA max
mA max
mA max
mA max
mA max
dB typ
Conditions/Comments
DV
DV
I
I
I
I
Unipolar mode
Bipolar mode
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
For specified performance
For specified performance
AV
Typically 0.22 mA; BUF = 0; f
Typically 0.45 mA; BUF = 1; f
AV
Typically 0.38 mA; BUF = 0; f
Typically 0.81 mA; BUF = 1; f
Digital inputs = 0 V or DV
Typically 0.06 mA; DV
Typically 0.13 mA; DV
Typically 0.15 mA; DV
Typically 0.3 mA; DV
SOURCE
SOURCE
SINK
SINK
DD
DD
DD
DD
= 800 μA except for MCLK OUT
= 100 μA except for MCLK OUT
= 3 V or 5 V; gain = 1 to 4
= 3 V or 5 V; gain = 8 to 128
= 5 V nominal
= 3 V nominal
= 200 μA except for MCLK OUT
= 100 μA except for MCLK OUT
DD
DD
DD
DD
= 5 V; f
= 3 V; f
= 5 V; f
= 3 V; f
DD
CLK IN
CLK IN
; external MCLK IN
CLK IN
CLK IN
CLK IN
= 1 MHz or 2.4576 MHz
= 1 MHz or 2.4576 MHz
CLK IN
CLK IN
CLK IN
= 2.4576 MHz
= 2.4576 MHz
= 2.4576 MHz
13
13
13
13
= 1 MHz
= 1 MHz
= 2.4576 MHz
; DV
; DV
; DV
; DV
DD
DD
DD
DD
= 5 V
= 3 V
= 5 V
= 3 V