AD7706 Analog Devices, AD7706 Datasheet
AD7706
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AD7706 Summary of contents
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... CLOCK GENERATION MCLK OUT GND The AD7705/AD7706 devices, with supply and a 1.225 V reference, can handle unipolar input signal ranges through 1.225 V. The devices can accept bipolar input ranges of ±10 mV through ±1.225 V. Therefore, the AD7705/AD7706 devices perform all signal conditioning and conversion for a 2-channel or 3-channel system ...
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... Accuracy ...................................................................................... 29 Drift Considerations .................................................................. 29 Power Supplies ............................................................................ 30 Supply Current............................................................................ 30 Grounding and Layout .............................................................. 30 Evaluating the Performance...................................................... 31 Digital Interface.......................................................................... 31 Configuring the AD7705/AD7706 .......................................... 33 Microcomputer/Microprocessor Interfacing ......................... 34 Code For Setting Up the AD7705/AD7706............................ 35 Applications..................................................................................... 38 Pressure Measurement............................................................... 38 Temperature Measurement ....................................................... 39 Smart Transmitters..................................................................... 40 Battery Monitoring .................................................................... 41 Outline Dimensions ....................................................................... 42 Ordering Guide .......................................................................... 43 Rev Page ...
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... Changes to Table 1 ............................................................................3 Updated Outline Dimensions........................................................42 Changes to Ordering Guide...........................................................43 6/05—Rev Rev. B Updated Format.................................................................. Universal Changed Range of Absolute Voltage on Analog Inputs Universal Changes to Table 19 ........................................................................21 Updated Outline Dimensions........................................................42 Changes to Ordering Guide...........................................................43 11/98—Rev Rev. A Revision 0: Initial Version Rev Page AD7705/AD7706 ...
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... AD7705/AD7706 PRODUCT HIGHLIGHTS 1. The AD7705/AD7706 devices consume less than supplies and 1 MHz master clock, making them ideal for use in low power systems. Standby current is less than 8 μA. 2. The programmable gain input allows the AD7705/AD7706 to accept input signals directly from a strain gage or transducer, removing a considerable amount of signal conditioning ...
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... REF ±V /gain nom REF Rev Page AD7705/AD7706 Conditions/Comments Guaranteed by design, filter notch < Depends on filter cutoffs and selected gain Filter notch < 60 Hz, typically ±0.0003% For gains 1, 2, and 4 For gains 8, 16, 32, 64, and 128 Typically ±0.001% ...
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... AD7705/AD7706 Parameter AIN Input Sampling Rate Reference Input Range REF IN(+) − REF IN(−) Voltage REF IN(+) − REF IN(−) Voltage REF IN Input Sampling Rate LOGIC INPUTS Input Current All Inputs, Except MCLK IN MCLK IN All Inputs, Except SCLK and MCLK IN Input Low Voltage, V ...
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... GND − 100 mV. Parts are functional with voltages down to GND − 200 mV, but with increased leakage at high temperatures. 10 The AD7705/AD7706 can tolerate absolute analog input voltages down to GND − 200 mV, but the leakage current increases. 11 The analog input voltage range on AIN(+) is given with respect to the voltage on AIN(−) on the AD7705, and with respect to the voltage of the COMMON input on the AD7706. The absolute voltage on the analog inputs should not be more positive than V Input voltages of GND − ...
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... See Figure 19 and Figure 20. 3 The f duty cycle range is 45% to 55%. f must be supplied whenever the AD7705/AD7706 are not in standby mode clock is present, the devices can draw CLKIN CLKIN higher current than specified, and possibly become uncalibrated. 4 The AD7705/AD7706 are production tested with f ...
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... DD −0 0.3 V device reliability. DD −40° 85°C −65° 150°C 150°C 450 mW 105°C/W 260°C 450 mW 75°C/W 215°C 220°C 450 mW 139°C/W 215°C 220°C >4000 V Rev Page AD7705/AD7706 ...
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... Chip Select. Active low logic input used to select the AD7705/AD7706. With this input hardwired low, the AD7705/AD7706 can operate in its 3-wire interface mode with Pin SCLK, Pin DIN, and Pin DOUT used to interface to the device. The CS pin can be used to select the device communicating with the AD7705/AD7706 ...
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... Serial Data Input. Serial data is written to the input shift register on the part. Data from the input shift register is transferred to the setup register, clock register, or communication register, depending on the register selection bits of the communication register Supply Voltage. 2 5.25 V operation GND GND Ground Reference Point for the AD7705/AD7706 Internal Circuitry. Rev Page AD7705/AD7706 ...
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... AD7705/AD7706 OUTPUT NOISE (5 V OPERATION) Table 5 shows the AD7705/AD7706 output rms noise for the selectable notch and −3 dB frequencies for the parts, as selected by FS0 and FS1 of the clock register. The numbers given are for the bipolar input ranges with 2.5 V and V ...
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... OUTPUT NOISE (3 V OPERATION) Table 7 shows the AD7705/AD7706 output rms noise for the selectable notch and −3 dB frequencies for the parts, as selected by FS0 and FS1 of the clock register. The numbers given are for the bipolar input ranges with 1.225 V and a V ...
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... AD7705/AD7706 TYPICAL PERFORMANCE CHARACTERISTICS 32771 25° 2.5V RMS NOISE = 600nV REF 32770 GAIN = +128 50Hz UPDATE RATE 32769 32768 32767 32766 32765 32764 32763 0 100 200 300 400 500 600 READING NUMBER Figure 5. Noise @ Gain = +128 With 50 Hz Update Rate 1 ...
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... OSCILLATOR = 4.9152MHz 2 OSCILLATOR = 2.4576MHz CH1 5.00V CH2 2.00V Figure 11. Crystal Oscillator Power-Up Time 5ms/DIV –40 –30 –20 –10 Figure 12. Standby Current vs. Temperature Rev Page AD7705/AD7706 MCLK TEMPERATURE ( ° C) ...
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... AD7705) and Table 13 (for the AD7706) show which channel combinations have independent calibration coefficients. With CH1 at Logic 1 and CH0 at Logic 0, the AD7705 looks at the AIN1(−) input internally shorted to itself, while the AD7706 looks at the COMMON input internally shorted to itself. This can be used as a test method to evaluate the noise performance of the parts with no external noise sources. In this mode, the AIN1(− ...
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... Table 12. Channel Selection for AD7705 CH1 CH0 AIN(+) 0 0 AIN1(+) 0 1 AIN2(+) 1 0 AIN1(− AIN1(−) Table 13. Channel Selection for AD7706 CH1 CH0 AIN 0 0 AIN1 0 1 AIN2 1 0 COMMON 1 1 AIN3 SETUP REGISTER (RS2, RS1, RS0 = 0, 0, 1); POWER-ON/RESET STATUS: 01 HEXADECIMAL The setup register is an 8-bit register from which data can be read or to which data can be written ...
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... AD7705/AD7706 Table 16. Operating Mode Options MD1 MD0 Operating Mode 0 0 Normal Mode. In this mode, the device performs normal conversions Self-Calibration. This activates self-calibration on the channel selected by CH1 and CH0 of the communication register. This is a one-step calibration sequence. When the sequence is complete, the part returns to normal mode, with both MD1 and MD0 returning to 0 ...
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... Register Description ZERO Zero. A zero must be written to these bits to ensure correct operation of the AD7705/AD7706. Failure might result in unspecified operation of the device. CLKDIS Master Clock Disable Bit. Logic 1 in this bit disables the master clock, preventing it from appearing at the MCLK OUT pin. When disabled, the MCLK OUT pin is forced low ...
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... However, the 16 bits of data written to the part will be ignored by the AD7705/AD7706. TEST REGISTER (RS2, RS1, RS0 = 1, 0, 0); POWER-ON/RESET STATUS: 00 HEXADECIMAL The part contains a test register that is used when testing the device ...
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... V in bipolar mode. Note that the bipolar ranges are with respect to AIN(−) on the AD7705, and with respect to COMMON on the AD7706, but not with respect to GND. The input signal to the analog input is continuously sampled at a rate determined by the frequency of the master clock, MCLK IN, and the selected gain. A charge-balancing ADC (∑ ...
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... It should be noted that the bipolar input signals are referenced to the respective AIN(−) input of each input pair. The AD7706 contains three pseudo differential analog input pairs, AIN1, AIN2, and AIN3, which are referenced to the COMMON input. ...
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... The nominal reference voltage, V (REF IN(+) − REF IN(−)), REF for specified operation is 2.5 V for the AD7705/AD7706 operated with and 1.225 V for the AD7705/AD7706 operated DD with The parts are functional with V DD down but performance will be degraded because the output noise, in terms of LSB size, is larger. REF IN(+) must be greater than REF IN(− ...
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... AD7705/AD7706. For example, if the required bandwidth is 7.86 Hz, but the required update rate is 100 Hz, data can be taken from the AD7705/AD7706 at the 100 Hz rate, giving a −3 dB bandwidth of 26.2 Hz. Postfiltering can then be applied to reduce the bandwidth and output noise to the 7.86 Hz bandwidth level while maintaining an output rate of 100 Hz ...
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... AIN(+) = AIN(−) = internal bias voltage on the AD7705, and AIN = COMMON = internal bias voltage on the AD7706). The PGA is set for the selected gain for this zero-scale calibration conversion, as per the G1 and G0 bits in the communication register. The full-scale calibration conversion ...
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... In unipolar mode, there is considerable flexibility in handling negative offsets with respect to AIN(−) on the AD7705, and with respect to COMMON on the AD7706. In both unipolar and bipolar modes, the range of positive offsets that can be handled by the part depends on the selected span. Therefore, in determining ...
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... However, to ensure correct calibration for the devices, a calibration routine should be performed after power-up. The power dissipation and temperature drift of the AD7705/ AD7706 are low, and no warm-up time is required before the initial calibration is performed. However external reference is used, it must be stabilized before calibration is initiated. ...
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... MCLK IN and MCLK OUT pins of the AD7705/ AD7706 general rule, the lower the ESR value, the lower the current taken by the oscillator circuit. When operating with a clock frequency of 2.4576 MHz, there μ ...
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... RESET command. STANDBY MODE The STBY bit in the communication register of the AD7705/ AD7706 allows the user to place the part in a power-down mode when it is not required to provide conversion results. The AD7705/AD7706 retain the contents of their on-chip registers, including the data register, while in standby mode ...
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... However, because the resolutions of the AD7705/ AD7706 are so high and the noise levels from the AD7705/ AD7706 are so low, care must be taken with regard to grounding and layout. The printed circuit board that houses the AD7705/AD7706 should be designed so that the analog and digital sections are separated and confined to certain areas of the board ...
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... The serial interface can be reset by exercising the RESET input. It can also be reset by writing a series the DIN input. If Logic 1 is written to the AD7705/AD7706 DIN line for at least 32 serial clock cycles, the serial interface is reset. This ensures that in 3-wire systems, if the interface is lost via either a software error or a glitch in the system, it can be reset to a known state ...
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... AD7705/AD7706 DRDY SCLK t 5 DOUT SCLK t 12 DIN MSB Figure 19. Read Cycle Timing Diagram MSB Figure 20. Write Cycle Timing Diagram Rev Page LSB t 16 LSB ...
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... CONFIGURING THE AD7705/AD7706 The AD7705/AD7706 contain six on-chip registers that the user can access via the serial interface. Communication with any of these registers is initiated by first writing to the communication register. Figure 21 outlines a flowchart of the sequence used to configure registers after a power-up or reset on the AD7705; ...
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... CPHA bits set to Logic 1. When the 68HC11 is configured like this, its SCLK line idles high between data transfers. The AD7705/ AD7706 are not capable of a full duplex operation. If the AD7705/ AD7706 are configured for a write operation, no data appears on the DOUT lines, even when the SCLK input is active. ...
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... DRDY output is connected to the INT1 input of the 8XC51. For interfaces that require control of the CS input on the AD7705/AD7706, a port bit of the 8XC51 (such as P1.1) that is configured as an output can be used to drive the CS input. The 8XC51 is configured in Mode 0 serial interface mode ...
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... AD7705/AD7706 C Code for Interfacing AD7705 to 68HC11 #include <math.h> #include <io6811.h> #define NUM_SAMPLES 1000 /* change the number of data samples */ #define MAX_REG_LENGTH 2 /* this says that the max length of a register is 2 bytes */ Writetoreg (int); Read (int,char); char *datapointer = store; char store[NUM_SAMPLES*MAX_REG_LENGTH + 30]; void main() ...
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... PORTC & 0xfb ; /* /CS is low */ for(b=0;b<reglength;b++) { SPDR = 0; while(!(SPSR & 0x80)); /* wait until port ready before reading */ *datapointer++=SPDR; /* read SPDR into store array via datapointer */ } PORTC|=4; /* /CS is high */ } Rev Page AD7705/AD7706 ...
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... AD7705/AD7706 APPLICATIONS The AD7705 provides a dual-channel, low cost, high resolution analog-to-digital function. Because the analog-to-digital function is provided by a Σ-Δ architecture, the part is more immune to noisy environments, thus making it ideal for use in industrial and process-control applications. It also provides a programmable gain amplifier, digital filter, and calibration options ...
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... However, the 6.25 kΩ resistor must have a low temperature coefficient to avoid errors in the reference voltage over temperature. MCLK IN MCLK OUT RESET DRDY CS SCLK , which shift the Rev Page AD7705/AD7706 400μA REF IN(+) 6.25kΩ REF IN(–) MCLK AD7705 ...
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... AD7705/AD7706 SMART TRANSMITTERS Another application where the low power, single-supply, 3-wire interface capabilities of the AD7705/AD7706 are beneficial is in smart transmitters. Figure 28 shows a block diagram of a smart transmitter using the AD7705. Because a smart transmitter must operate from loop, tolerances in the loop ...
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... MULTIPLEXER VDIFF1 VCELL 2 VDIFF2 V DD AD7705 VCELL 3 VDIFF3 AIN1(+) REF IN(+) AIN1(–) VCELL 4 VDIFF4 AIN2(+) AIN2(–) Figure 29. Battery Monitoring Using the AD7705 Rev Page AD7705/AD7706 mV. Absolute voltages VOLTAGE REGULATORS 1.225V LOAD REF REF IN(–) , provided that ...
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... AD7705/AD7706 OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193 10.00 (0.3937) 1.27 (0.0500) 2.65 (0.1043) BSC 2.35 (0.0925) 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) SEATING COPLANARITY PLANE 0.10 0.31 (0.0122) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. ...
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... AD7706BRZ-REEL7 −40°C to +85°C AD7706BRU −40°C to +85°C AD7706BRU-REEL −40°C to +85°C AD7706BRU-REEL7 −40°C to +85°C 1 AD7706BRUZ −40°C to +85°C 1 AD7706BRUZ-REEL −40°C to +85°C 1 AD7706BRUZ-REEL7 −40°C to +85°C EVAL-AD7705EB EVAL-AD7706EB Pb-free part ...
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... AD7705/AD7706 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01166-0-5/06(C) Rev Page ...