AD5755 Analog Devices, AD5755 Datasheet - Page 44

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AD5755

Manufacturer Part Number
AD5755
Description
Quad Channel, 16-Bit, Serial Input,
Manufacturer
Analog Devices
Datasheet

Specifications of AD5755

Resolution (bits)
16bit
Dac Update Rate
91kSPS
Dac Settling Time
11µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
I or V Out
Dac Input Format
SPI

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AD5755
DC-to-DC Converter Compensation Capacitors
As the dc-to-dc converter operates in DCM, the uncompensated
transfer function is essentially a single-pole transfer function.
The pole frequency of the transfer function is determined by
the dc-to-dc converter’s output capacitance, input and output
voltage, and output load. The AD5755 uses an external capacitor
in conjunction with an internal 150 kΩ resistor to compensate
the regulator loop. Alternatively, an external compensation
resistor can be used in series with the compensation capacitor,
by setting the DC-DC Comp bit in the dc-to-dc control register.
In this case, a ~50 kΩ resistor is recommended. A description
of the advantages of this can be found in the AICC Supply
Requirements—Slewing section in the Device Features section.
For typical applications, a 10 nF dc-to-dc compensation
capacitor is recommended.
DC-to-DC Converter Input and Output Capacitor
Selection
The output capacitor affects ripple voltage of the dc-to-dc
converter and indirectly limits the maximum slew rate at which
the channel output current can rise. The ripple voltage is caused
by a combination of the capacitance and equivalent series
resistance (ESR) of the capacitor. For the AD5755, a ceramic
capacitor of 4.7 μF is recommended for typical applications.
Larger capacitors or paralleled capacitors improve the ripple at
the expense of reduced slew rate. Larger capacitors also impact
the AV
AICC Supply Requirements—Slewing section). This capaci-
tance at the output of the dc-to-dc converter should be >3 μF
under all operating conditions.
The input capacitor provides much of the dynamic current
required for the dc-to-dc converter and should be a low ESR
component. For the AD5755, a low ESR tantalum or ceramic
capacitor of 10 μF is recommended for typical applications.
Ceramic capacitors must be chosen carefully because they can
exhibit a large sensitivity to dc bias voltages and temperature.
X5R or X7R dielectrics are preferred because these capacitors
remain stable over wider operating voltage and temperature
ranges. Care must be taken if selecting a tantalum capacitor to
ensure a low ESR value.
AI
The dc-to-dc converter is designed to supply a V
See Figure 52 for a plot of headroom supplied vs. output
voltage. This means that, for a fixed load and output voltage,
the output current of the dc-to-dc converter can be calculated
by the following formula:
where:
I
OUT
CC
is the output current from I
V
SUPPLY REQUIREMENTS—STATIC
AI
BOOST
CC
CC
supplies current requirements while slewing (see the
=
= I
Efficiency
OUT
Power
× R
LOAD
×
Out
AV
+ Headroom
CC
=
OUT_x
η
I
V
OUT
BOOST
in amps.
×
V
×
BOOST
AV
CC
BOOST
voltage of
Rev. A | Page 44 of 52
(2)
(3)
η
and Figure 55).
AI
The AI
static operation because the output power increases to charge
the output capacitance of the dc-to-dc converter. This transient
current can be quite large (see Figure 80), although the methods
outlined in the Reducing AICC Current Requirements section
can reduce the requirements on the AV
AI
this AV
further. This means that the voltage at AV
Equation 3) and the V
may never reach its intended value. Because this AV
common to all channels, this may also affect other channels.
Reducing AI
There are two main methods that can be used to reduce the
AI
compensation resistor, and the other is to use slew rate control.
Both of these methods can be used in conjunction.
A compensation resistor can be placed at the COMP
in series with the 10 nF compensation capacitor. A 51 kΩ exter-
nal compensation resistor is recommended. This compensation
increases the slew time of the current output but eases the AI
transient current requirements. Figure 81 shows a plot of AI
current for a 24 mA step through a 1 kΩ load when using a
51 kΩ compensation resistor. This method eases the current
requirements through smaller loads even further, as shown in
Figure 82.
V
BOOST
CC
CC
CC
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Figure 80. AI
0
current can be provided, the AV
current requirements. One method is to add an external
SUPPLY REQUIREMENTS—SLEWING
0
CC
is the efficiency at V
CC
current requirement while slewing is greater than in
drop, the AI
CC
CC
0.5
Current Requirements
with Internal Compensation Resistor
Current vs. Time for 24 mA Step Through 1 kΩ Load
AI
I
V
OUT
BOOST
CC
CC
BOOST
current required to slew increases
1.0
INDUCTOR = 10µH (XAL4040-103)
TIME (ms)
voltage, and thus the output voltage,
BOOST_x
as a fraction (see Figure 54
1.5
0mA TO 24mA RANGE
CC
CC
voltage drops. Due to
supply. If not enough
CC
f
SW
2.0
drops further (see
1kΩ LOAD
T
= 410kHz
A
Data Sheet
= 25°C
CC
DCDC_x
2.5
voltage is
30
25
20
15
10
5
0
pin
CC
CC

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